"Assembly Language"-chapter I (3)

First part bus

1. The external bus of the 8086CPU is 20, but the internal bus of the CPU is 16, so the CPU must first form 20 bits internally when it passes the physical address of 20 bits in memory.

The physical address, from 16-bit to 20-bit changes, will inevitably slow down the CPU speed. The contradiction between the CPU and the number of internal buses in order to pursue a more powerful addressing capability.

2. The 8086CPU data bus is 16 bits, and the CPU and the external components transmit two bytes at a time, which creates a problem? 20-bit physical address formed within the CPU

How is it transmitted to memory via a 16-bit data bus?

The width of the data bus determines the efficiency of the data transfer between the CPU and other devices, and how much data is transmitted at a time.

3. The control bus determines the control capacity of the CPU, including the reading and writing function of the amount of money, I can say that the wider the CPU control bus, the more functions?

"Assembly Language"-chapter I (3)