1, FLD
Instruction format:
FLD Streg/memreal
Command function:
The floating-point data is pressed into the coprocessor's stack. When the memory unit content is stacked, the system automatically determines the accuracy of the transmitted data. For example, a memory unit value defined with DD or REAL4 is a single-precision number.
The Streg is the processor stack register ST (0) ~st (7).
For example:
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.387 Data1 DWORD 123,-543 Data2 real8-321.5 Data3 REAL10 2.5 ...... FLD data1; Press a single-precision data into the stack FLD data2; Pressing a double-precision data into a stack FLD St (0); Pushes the value of the stack register st (0) back into the stack FLD Data3; Pressing an extended precision data into the stack |
2, FST
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Instruction format: Command function: |
FST Streg/memreal Transfers the data at the top of the coprocessor stack to the target operand. When data transfer occurs, the system automatically rounds the top floating point number to the corresponding precision based on the setting of the rounding control bit in the control register. |
3, FSTP
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Instruction format: |
FSTP Streg/memreal |
Command function: |
Similar to FST, the difference is that after the instruction FST executes, the stack is not ejected, that is, the stack does not change, and when the instruction FSTP executes, the stack is ejected and the stack changes. |
As can be seen from the floating-point instructions above, not only the memory variables can be transferred, but also the transfer between registers, which is the integer data and the BCD type data transfer instructions do not have.
4, Fxch
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Instruction format: Command function: |
Fxch [Streg] Swaps the floating-point number in the specified register with the heap top floating-point number. If no operand is specified, the data is exchanged between the default St (0) and St (1). |
For example: Fxch St (2)--st (0) data exchange with stack Register ST (2).
Since the FXCH directive implies St (0) as one of the operands, it is necessary to specify only one operand thereafter, but the operand must be a register and cannot be the St (0), but the register after the instruction is optional, if no register operand is specified, then the implication is for St (1) and St (0) For Exchange.
A little summary of the data transfer instructions: It includes three kinds of data transmission instructions, integer, compressed BCD and real, three kinds of data transmission has its own instruction set.
The compressed BCD transfer instruction has only a stack and two stacks: Fbld and FBSTP, they all have only one operand, and the operand must be the Tword type of the memory operand.
The integer data transfer directive has three: Fild, fist, and FISTP, where the latter two are out of the stack, the only difference being whether or not the stack top data is changed (popped) after the stack. They all have only one operand, and the operand must be a word, DWORD, and Qword type for the memory operand, and cannot be of type byte.
In relative terms, the real number of the delivery instruction is more, it a total of four: FLD, FST, FSTP and Fxch. The first three directives are used in a similar way to integer types, except for the transfer of real data, and three instructions not only support memory operands (for REAL4, REAL8, and REAL10 types), but also support transfer between registers. Three instructions also require an operand. For fxch directives, it can have one or no operands, but if there are operands, then this parameter must be a register.
Assembly language: Floating point transfer instructions