assembly language--flag register

Flag Register

Flag is not the same as other registers, and other registers are used to hold data, all of which have a meaning for the entire register.

The flag register is a bitwise function, which means that each of its bits has a special meaning and records specific information.

The structure of the flag register for 8086CPU:

ZF logo

The 6th digit of flag is the ZF, 0 flag bit (zero flag).

It records whether the result is 0 after the execution of the relevant instruction (Add, Sub, Mul, Div, Inc, or, and operation). ZF = 1 The result is not 0,ZF = 0 result is 0.

mov, push, pop and other transfer instructions do not modify the flag register information.

PF Flag

The 2nd position of flag is PF, parity flag bit.

It records whether the number of 1 in all bits of the result is even if the instruction is executed, and if it is even then PF = 1, odd, pf = 0.

SF Flag

The 7th bit of flag is the SF, the symbol sign bit.

It records whether the result is negative after the instruction is executed (that is, if the first digit of the binary is not 1), if the negative number is SF = 1, the result is positive, SF = 0.

For example:

We can use the operation of the add instruction as an unsigned number operation, then the add instruction is equivalent to the calculation 129+1, and the result is (10000010B),

You can also use the operation of the add instruction as an operation of the signed number , then the add instruction is equivalent to the calculation-(125+1) (complement =-(original code negation + 1)) and the result is -126 (10000010B).

CF logo

The No. 0 bit of flag is CF, carry flag bit.

In general, when an unsigned number operation is performed, it records the most significant bit of the result of the operation to a higher value, or from a higher borrow value .

For example, two 8-bit data: 98h+98h, will produce a carry.

Since this carry value cannot be saved in 8 digits, in fact the CPU does not discard this value when it is operating, but it is recorded on one of the special registers.

8086CPU uses the CF bit of flag to record this value .

For example, two 8-bit data: 97h-98h, will generate borrow , borrow, equivalent to the calculation 197h-98h.

The CF bit of flag can also be used to record this borrow value .

CF records borrow when subtraction, record carry when addition

Determine if addition has carry: two eight-bit data added is greater than 255 (2^8)

Determine if subtraction is borrow: Two eight-bit data addition is less than-255

of flags

In the case of a signed number operation , if the result exceeds the range that the machine can represent, it is called overflow.

MOV al,98

Add al,99

The result of the add instruction operation is (AL) =0c5h, because there is a character if we are using the add command to perform a signed number operation, then the result of 98+99=-59 is unacceptable.

The reason for this is that the actual result 197, as a signed number, is not stored in the 8-bit register AL.

Errors that result from overflow may occur due to a signed number operation.

The CPU needs to record whether an overflow is generated after the instruction is executed.

The 11th bit of flag is the of, overflow flag bit.

In general, the to record whether the result of a signed number operation has overflowed . If overflow occurs, of=1, if not, of=0.

Be sure to note the difference between CF and of:

CF is a symbolic bit that is meaningful for unsigned number operations, and for unsigned number operations, the CPU uses CF bits to record whether a carry is generated;

And of is the symbolic number of the operation has a meaningful flag bit, for the signed number operation, the CPU with the of the bit to record whether the overflow, of course, but also with the SF bit to record the results of the symbol.

method to determine whether the is 1: if two positive 8-bit data is added, the value is negative or two negative 8-bit data is added, the value of the number is 1

1 al CF of SF ZF PF2 SubAl,al 0h/0000 0000b      0     0     0     1     13 moval,10h 10h/0010 0000b     0     0     0     1     14 Addal,90h a0h/1010 0000b     0     0     1     0     15 moval,80h 80h/ + 0000b     0     0     1     0     16 Addal,80h 0h/0000 0000b      1     1     0     1     17 movAl,0fch 0fch/11111100b    1     1     0     1     18 Addal,05h 1h/0000 0001b      1     0     0     0     09 movAL,7DH 7dh/11111101b     1     0     0     0     0Ten AddAL,0BH 88h/ +1000b     0     1     1     0     1

View CodeInstruction ADC directives

The ADC is a carry addition instruction that takes advantage of the values recorded on the CF bit.

Format:ADC Action object 1, operand 2

Functions: manipulating objects 1 = manipulating objects 1+ manipulating objects 2+cf

For example: ADC AX,BX is implemented with the following functions: (AX) = (AX) + (BX) +CF

Let's take a look at two data: How 0198H and 0183H are added:

01 98

+ 01 83

1

-----------------

Geneva 1B

As you can see, addition can be done in two steps:

(1) Add the low level;

(2) The sum of the highs plus the value of the lower sum.

The following instruction and add ax, BX have the same result:

Add AL,BL; The low sum produces the rounding

ADC AH,BH; And then with the ADC, when the high level is added, the rounding

It appears that the purpose of the CPU to provide ADC instructions is to perform the second step of the addition.

The ADC instruction, together with the add instruction, allows the addition of larger data .

SBB directives

SBB is a borrow subtraction instruction that leverages the borrow value recorded on the CF bit.

Format:SBB Action Object 1, operand 2

Function: Action Object 1 = Action Object-Action Object 2–CF

For example: SBB AX,BX

Implementation features: (AX) = (AX) – (BX) –CF

CMP directive * * *

CMP is a comparison instruction, functionally equivalent to a subtraction instruction, except that the result is not saved.

After the CMP directive executes, it affects the flag register .

Other relevant instructions can be used to identify these affected flag register bits to know the comparison results.

Format:CMP Action object 1, operand 2

Function: calculates the operand 2 , but does not save the result, only sets the flag register based on the result of the calculation.

In fact, after we execute the CMP instruction, the value of the relevant flag bit can be used to see the results of the comparison.

For example: CMP ax,bx

The above can be drawn:

The value of CF above can be judged by the size, then through the and SF can also be known (Understanding on the line)

(1) If sf=1, and of=0

Of=0, stating that there is no overflow, the positive or negative of the real result of logic = the positive or negative of actual result;

Because of sf=1, the actual result is negative, so the logical result is negative, so (AH) < (BH).

(2) If sf=1, and of=1

Of=1, indicating that there is overflow, the positive or negative ≠ actual result of the real result of the logic,(ie, as long as 1, then the logical result is reversed)

Because of the sf=1, the actual result is negative, the actual result is negative, and there is overflow, this indicates that because the overflow causes the actual result to be negative,

Simply analyzing it, it can be seen that if the actual result is negative because of overflow, then the logical real result must be positive. This way, Sf=1,of = 1, explains (AH) > (BH).

(3) If sf=0, and of=1

Of=1, indicating that there is overflow, the positive and negative ≠ of the real result of the logic is positive or negative;

Because sf=0, the actual result is non-negative, and the of=1 indicates overflow, then the result is not 0, so the actual result is positive. The actual result is positive, and there is overflow, which means that the overflow causes the actual result to be non-negative,

Simply analyzing it, you can see that if the actual result is positive because of the overflow, then the logical real result must be negative. This way, Sf=0,of = 1, explains (AH) < (BH).

(4) If sf=0, and of=0

Of=0, stating that there is no overflow, the positive or negative of the real result of logic = the positive or negative of actual result;

Because of sf=0, the actual result is not negative, so the logical result must be non-negative. SO (AH) ≥ (BH).

Conditional transfer Instructions for detecting comparison results

Transfer instruction + marking at transfer

assembly language--flag register