Assembly language (Wang Shuang) 2nd Chapter Register

CPU consists of devices, controllers, registers, etc.

The assembly instruction can manipulate the data in the register. such as MOV ax,bx is the value in the Register BX, plus the value in the Register ax, and then put the results on the ax

There are 14 registers of 8086CPU, here is the AX,BX,CX,DX,CS,IP so few first

2.1 General-Purpose registers

That means ax,bx,cx,dx.

Used to store general data

such as AX is 16-bit, but the generation before 8086CPU is 8-bit, so ax is divided into Ah,al to be compatible with previous versions of the data

Similarly bx,cx,dx. h of AH is the meaning of high, in the left-highest position, L is the meaning of low on the right is the status

Storage of 2.2 words in registers

A 16 binary equivalent of 2 binary 4 bits

Binary 0100111000100000 into 16 binary is 4 (0100) E (1110), 2 (0010), 0 (0000)

One memory unit size of one byte, 8 bits

2.3 Several assembly instructions

When the assembly data overflows, the high will be automatically cut off

For example, Al's data is C5h,add al 93H is 158H, but 8 bits of space can only put 2 16 data, so it will become 58H

If you execute add AX 93H, the low 8-bit data will be placed eight bits high

Why, because the CPU will assume that the operation is 16-bit, the original value is 00c5h, plus the value is 0093H.

The number of bits of the 2 operand of the instruction should be consistent

Here's the wrong chestnut.

Add Al,ax

2.4 Physical Address

Each memory unit has a unique corresponding physical address, the CPU wants to read and write a memory unit of data, the first to find the corresponding physical address of the memory unit

2.5 CPU with 16-bit structure

16-bit refers to the register width is 16 bits, the address width is 16 bits

2.6 8086CPUshow Physical Address method

8086CPU has 20 address bus, can represent 2 of 20 times to put a physical address

But 16-bit machine, 1-time processing, transmission, storage address of 16 bits, what to do

8086 a method of synthesizing a 20-bit address with 2 16-bit

Transfer segment address and offset address to address adder, and then output a 20-bit physical address to the input and output control circuit, and then through the 20-bit bus to the memory,

Address adder with Physical address = Segment Address *16+ offset address, segment address left to move one

An X-binary is a left-hand movement of data, which is equal to X

2.7 Meaning of the physical address calculation

Physical Address = Segment Address *16+ offset address

Base address = Segment Address *16+ offset address

Physical Address = Base Address + offset address

If I need to give you 2888 of this 4 digits, but I have a maximum of 3 digits

Then I will write 2 3 digits for you, and in advance, the first one to *10

With the first 200 and the second 888, the result is 200*10+888=2888.

Concept of paragraph 2.8

Memory does not fragment, segment is divided from CPU

The CPU uses physical address = Base Address + offset address to give the physical address of the memory unit, we can use an imaginary segmented way to manage the memory

As needed, consider several contiguous memory units as one segment

Represents the starting address with the base address, and locates the memory cells in the segment with offsets

The beginning address of the segment (base address) must be a multiple of 16, base address = Segment Address *16+ offset address

The maximum length of a segment is 2 16, and the offset address is 16 bits

2.9 Address Register

The segment address is placed in register CS and the offset address is placed in the Register IP

Cs+ip can point to a specific memory unit.

8086CPU Work Flow

1 cs:ip point to read instruction to instruction Buffer

2 ip+ instruction length, skip to next instruction

3 Execute buffer instruction, skip to step 1

Directives and content are indistinguishable in memory, but memory units pointed to by CS:IP are instructions

2.11 Modifying CS, IP directives

After JMP 2ae3:3 executes, cs=2ae3h,ip=0003h,cpu reads instructions from 2ae33h

JMP ax equivalent to mov IP ax

Summary

8086CPU has 4 segment registers, where CS is used to place the segment address of the instruction. The offset address that IP uses to place instructions

Find a boring feature when writing code,

Input ffff:0000, can plug into the production date of the CPU, 92 old machine? and is read-only information, do not know reliable No.

Because the Win64 bit can not directly run debug, so use DOSBox to run, the tutorial is as follows

http://blog.csdn.net/jiajiayouba/article/details/8537986

Assembly language (Wang Shuang) 2nd Chapter Register