Automation Variables in Linux

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Automation Variables in Linux

In a pattern rule, the target and dependent file name of a rule represents a class of file names; A rule's command is a description of all this type of file rebuilding process, and obviously, no specific file name can appear in the command, otherwise the pattern rule loses its meaning. Then how to represent the file in the command line of the pattern rule will be the focus of this section's discussion.

If you need to write a pattern rule that compiles the. c file to an. o file, how do you write the correct source file name for GCC? Of course, you cannot use any specific filename because the source file name is different every time the pattern rule is executed. To solve this problem, you need to use the "Automatic loop variable", the value of the automation variable is based on the specific rules to be executed, depending on the execution of the rules of the target and dependent file name.

All of the automation variables are described below:


Represents the target file name for the rule. If the target is a document file (Linux, which is generally called the. a file as a document file, also known as a static library file), then it represents the file name of the document. In a multi-target pattern rule, it represents the target filename of which trigger rule is executed.


Represents a member name of a static library when the target file for the rule is a static library file. For example, the target of a rule is "foo.a (BAR.O)", the value of "$%" is "BAR.O", and "$@" is "FOO.A". If the destination is not a static library file, its value is null.


The first dependent file name for the rule. If a target file is rebuilt using an implied rule, it represents the first dependent file that is joined by an implied rule.


A list of all dependent files that are newer than the target file, separated by spaces. If the destination is a static library file name, the library member (. o file) is represented.


A list of all dependent files for the rule, separated by a space. If the target is a static library file, it represents only the name of all library members (. o files). A file can be duplicated in the target's dependencies, and the variable "$^" records only one reference to it. This means that the variable "$^" removes duplicate dependent files.


Similar to "$^", but it retains files that appear repeatedly in dependent files. It is mainly used in the cross-reference of the program Link Time library.


In pattern rules and static pattern rules, the "stems" are represented. "Stem" is part of "%" in target mode (the "Stem" also contains the table of contents (before the slash) when there is a directory in the file name). For example: File "Dir/", when the target mode is "a.%.b", "$*" value is "Dir/". "Stems" are useful for constructing related file names.

Automation variable "$*" requires two points:

1 There is no "stem" for an explicitly specified rule, in which case the meaning of "$*" changes. At this point, if the target filename has a recognized suffix, then "$*" means the part of the file except for the suffix. For example: "FOO.C" the value of "$*" is: "foo" because. c is an identifiable file suffix name. GUN make's strange handling of explicit rules is to be compatible with other versions of make. In general, you should avoid using this variable in rules that explicitly specify the target file in addition to static rules and pattern rules.

2 This variable is empty when the target file name contains an unrecognized suffix in the rule that specifies the file name explicitly.

Automation variable "$?" is also useful in explicit rules, which can be used to specify that only dependent files that are updated will be manipulated. For example, the static library file "Libn.a", which consists of some. o files. This rule enables you to add only the updated. o Files to the library:


Ar r lib $?

In the automation variables listed above. Four of them represent filenames in the rule ($@, $<, $%, $*). The other three represents a list of file names in the rule. In GUN make, you can also use these seven automation variables to obtain a directory part and a specific file name portion of a full file name. Adding "D" or "F" characters to these variables forms an automatic loop variable of a series of variants. These variables appear in previous versions of Make, and in current version make, you can use the "dir" or "notdir" functions to achieve the same functionality.

$ (@D)

Represents the directory portion of the destination file (excluding slashes). If "$@" is "dir/foo.o", then the value of "$ (@D)" is "dir". If "$@" does not have a slash, the value is "." (current directory). Notice the difference between it and the function "dir"!

$ (@F)

The full file name of the destination file is in addition to the directory (the actual file name). If "$@" is "dir/foo.o", then "$ (@F)" is only "foo.o". "$ (@F)" is equivalent to the function "$ (notdir $@)".

$ (*D)

$ (*F)

Represents the directory part and file name portion of the target "stem" respectively.

$ (%d)

$ (%F)

When targeting a static library as "archive (member)," represents the directory part and file name portion of the name of the library file members "". It is only valid for this form of rule goal.



Represents the directory part and file name portion of the first dependent file in the rule, respectively.

$ (^D)

$ (^F)

Represents the directory portion and file portion of all dependent files (no same file exists).

$ (+d)

$ (+F)

Represents the directory portion and file portion of all dependent files (duplicate files can exist).

$(? D

$(? F

Represents the directory part and file name portion of the dependent file being updated, respectively.

When discussing automation variables, we use the form of "$<" directly in order to distinguish them from ordinary variables such as "Cflags". This form is only for the purpose of distinguishing the ordinary variable from the other. In fact, for Automatic loop variable and normal variable, the name of the variable that represents the first dependent file name of the rule is actually "<", we can use "$ (<)" Instead of "$<". However, when referencing an Automation variable, the usual practice is "$<", because the automation variable itself is a special character.

GUN make also supports the "SYSV" feature, allows special variable references to be used in the list of dependencies of the rule (general automation variables can only be referenced on the command line of the rule) "$$@", "$$ (@D)" and "$$ (@F)" (Note: to use "$$"), they represent the " The full file name of the target, the directory section in the destination file name, and the actual file name portion of the target. These three special variables can only be used in rules that explicitly specify the target file name or in static mode rules, and are not used in implied rules. In addition, SYSV make and GNU make have different handling of rule dependencies. SysV make replaces the rule's dependencies two times, and gun make handles the list of dependencies only once, directly expanding the variables and function references.

This quirky feature of automation variables is entirely for compatibility with SYSV versions of makefile files. You can use GNU make without considering this, or you can use pseudo targets in makefile. POSIX "to prohibit this feature.

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