BOOTH Multiplier Principle

In a microprocessor chip, multiplier is the core of digital signal processing and a key component for processing data in the microprocessor. The frequency of the microprocessor is basically determined by the period in which the multiplier completes an operation. The speed and area optimization of the multiplier is very important for the performance of the entire CPU. In order to speed up the execution of the multiplier and reduce the area of the multiplier, it is necessary to study the algorithm, structure and circuit implementation of the multiplier in depth. The basic principle of the work of the Booth algorithm and the common structure multiplier of the multiplier is to first generate partial product, and then add these partial product to get the product. In the current Multiplier Design, the Base 4 Booth algorithm is widely used in the process of partial product generation. For the n-bit signed number multiplication A × B, the conventional Multiplication operation produces n partial products. If the base 4booth code is used for multiplier B, three digits must be considered each time: adjacent high, standard, and adjacent low. After encoding, the number of partial products can be reduced to [(n + 1) /2]? ([X] is an integer not greater than X.) The calculation amount is 0, ± 1A, and ± 2a. To implement 2a, you only need to shift a to the left. Therefore, the Base 4 Booth algorithm is convenient and quick for symbol number multiplication. For the unsigned number, you only need to scale it up to 0, while other processing methods are the same. After expansion, the number of partial products may be 1 more than that of the signed number multiplication method. However, this algorithm ensures hardware consistency and is conducive to implementation. For 32-bit multiplication, combined with the instruction set design, the partial product that needs to be added generally cannot exceed 18

The Booth multiplier is a bitwise operation multiplier, which is different from the traditional one. The traditional multiplier relies on addition and keeps accumulating.
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The Booth multiplier has an important addition operation. Let's take a look.
B [-1] is the right side of B's zero position, which is a hypothetical bit. For example, 0010 0 B [-1] is 0.
The BOOTH Multiplier introduces p space.
To the left or to the right refers to the p space. What is p space? Let's take the multiplication of 7 (0111) and 2 (0010) as an example. Their n digits are 4 digits. Therefore, the p space is N * 2 + 1 = 9. How does p SPACE perform multiplication?
 
The Code is as follows:
Module product (input CLK, input rstn,
Input start_sig, input [7: 0] A, input [7: 0] B,
Output done_sig, output [15: 0] product,
Output [7:0] sq_a, output [7:0] sq_s, output [16:0] sq_p );
/*************************/
Reg [] I; Reg [] A; // register Reg [] s of a; // The complement code of a plus 1 A non Reg [] P; // P space memory Reg [] X; // operation count Reg isdone;
Always @ (posedge CLK or negedge rstn) if (! Rstn) begin I <= 4 'd0; A <= 8 'd0; S <= 8 'd0; P <= 17 'd0; x <= 4 'd0; isdone <= 1' B0; end else if (start_sig) Case (I) 0: Begin a <= A; S <= (~ A + 1 'b1); P <= {8 'd0, B, 1 'b0}; I <= I + 1 'b1; end 1: if (x = 8) Begin x <= 4'd0; I <= I + 4'd2; end else if (P [1:0] = 2'b01) begin P <= {P [16:9] + A, P [8:0]}; I <= I + 1 'b1; end else if (P [1:0] = 2 'b10) Begin P <= {P [16:9] + S, P [8:0]}; I <= I + 1 'b1; end else I <= I + 1 'b1; 2: Begin P <= {P [16], p [16:1]}; x <= x + 1 'b1; I <= I-1 'b1; end 3: Begin isdone <= 1 'b1; I <= I + 1' B1; end 4: Begin isdone <= 1 'b0; I <= 4'd0; end endcase
/*************************/
Assign done_sig = isdone; assign Product = P [16:1];
/*************************/
Assign sq_a = A; assign sq_s = s; assign sq_p = P; /**************************/endmodule

BOOTH Multiplier Principle