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In short, Flash is divided into two types based on different internal access interfaces,
One is the nor flash that is directly accessed according to the data/address bus, just like access to SDRAM,
The other is only 8-bit (X8)/16-bit (x16) or more (x32 /...) for a bus with a bandwidth, the long address must be divided into several parts for each access,
Pass in the nand flash file that can be accessed separately.
The service life of NAND and nor, the speed of block erasure, and the error probability of data storage differ greatly.
Nor Flash has common interfaces and SPI Interfaces Based on external interfaces.
The nor flash of common interfaces most support the CFI interface. Therefore, it is also called the CFI interface.
The CFI interface is also called the parallel interface and the parallel interface relative to the serial SPI;
In addition, the CFI interface is defined by JEDEC. Therefore, some CFI interfaces are called JEDEC interfaces.
Therefore, for nor flash, CFI interface = JEDEC interface = parallel interface
Therefore, it can be simply understood as: For nor flash,CFI Interface=JEDEC Interface=Parallel Interface
For more information about the CFI interface, see:
Flash Memory: nand, EEPROM, NVRAM and others [ZT]
Http://hi.baidu.com/serial_story/blog/item/95f14cf09e1b00a6a50f5260.html
The common parallel/CFI/JEDEC interface has many nor flash pins and a large chip, such:
SPI is a common interface.
the SPI interface is mainly relative to the nor of CFI/parallel, which can reduce the number of pins.
the chip package size is reduced and the nor flash after SPI is used, there are only 8 pins, for example: