1. Dip dual-row direct insert Encapsulation
Dip (dualin-line package) is an integrated circuit chip encapsulated in the form of Dual-row direct insertion. Most small-and medium-sized Integrated Circuits (IC) use this encapsulation form, generally, the number of pins cannot exceed 100. The CPU chip in dip package has two pins and needs to be inserted into the chip socket with dip structure. Of course, it can also be directly inserted into the circuit board with the same number of welding holes and geometric arrangement for welding. The dip-encapsulated chip should be particularly careful when plugging from the chip outlet to avoid damage to the pin.
Dip Encapsulation has the following features:
1. Suitable for Perforation welding on PCB (Printed Circuit Board) for easy operation.
2. the ratio between the chip area and the encapsulation area is large, so the size is also large.
8088 of Intel series CPUs use this encapsulation form, as well as cache and early memory chips.
Ii. QFP plastic square flat encapsulation and PFP Plastic Flat Assembly Encapsulation
The chip pins in QFP (plastic quad flat package) package are very small and thin. Generally, large-scale or super-large integrated circuits use this encapsulation mode, and the number of pins is generally over 100. The chip encapsulated in this form must be soldered to the motherboard using SMD (surface-mounted device technology. The chip installed with SMD does not need to be punched on the motherboard. Generally, the solder joints of the corresponding pins are designed on the motherboard surface. The chip pin can be aligned with the corresponding Solder Joint to achieve welding with the motherboard. It is difficult to disassemble the chip welded in this way without special tools.
The chip encapsulated by PFP (Plastic Flat package) is basically the same as that of QFP. The only difference is that QFP is generally a square, while PFP can be a square or a rectangle.
QFP/PfP Encapsulation has the following features:
1. Suitable for SMD surface Installation Technology on PCB Board installation and wiring.
2. Suitable for high-frequency use.
3. easy operation and high reliability.
4. the ratio between the chip area and the encapsulation area is small.
80286, 80386, and some 486 boards in Intel series CPUs use this encapsulation form.
3. PGA plug-in Grid Array Encapsulation
The PGA (PIN Grid Array package) chip is encapsulated in the form of multiple matrix-shaped pins inside and outside the chip. Each matrix-shaped pin is arranged at a certain distance between the four sides of the chip. The number of pins can be 2-5 circles. During installation, insert the chip into a dedicated PGA outlet. To make it easier for the CPU to be installed and detached, a CPU outlet named zif is available starting from the 486 chip to meet the requirements of CPU installation and disassembly In the PGA package.
Zif (zero insertion force socket) is a socket with no plugging force. By gently lifting the wrench on the socket, the CPU can be easily and easily inserted into the socket. Then press the wrench back to the original place and use the squeeze pressure generated by the special structure of the socket to firmly connect the CPU pin to the socket. There is no bad contact problem. However, if you need to remove the CPU chip, you only need to gently lift the socket wrench to relieve the pressure, and the CPU chip can be easily removed.
The PGA package has the following features:
1. Easier plugging and high reliability.
2. It can adapt to a higher frequency.
Among intel series CPUs, 80486 and Pentium Pro all adopt this encapsulation form.
Iv. bgasphere array Encapsulation
With the development of integrated circuit technology, the packaging requirements for integrated circuits are more stringent. This is because the encapsulation technology is related to the functionality of the product. When the frequency of the IC exceeds MHz, the traditional encapsulation method may produce the so-called "crosstalk" phenomenon, in addition, when the number of pins of an IC is greater than 208, the traditional encapsulation method is difficult. Therefore, in addition to QFP encapsulation, most of today's high-end chips (such as form chips and chipset) use the BGA (Ball Grid Array package) encapsulation technology. BGA becomes the best choice for high-density, high-performance, multi-pin encapsulation, such as CPU and motherboard chip in the South/North Bridge.
BGA encapsulation technology can be divided into five categories:
1. PBGA (plasric bga) substrate: generally a multi-layer laminate consisting of 2-4 layers of organic materials. In intel series CPUs, Pentium II, III, and IV processors all use this encapsulation form.
2. CBGA (ceramicbga) substrate: A ceramic substrate. The electrical connection between the chip and the substrate is usually installed using a flipchip (FC. In intel series CPUs, Pentium I, II, and Pentium Pro processors all use this encapsulation form.
3. FCBGA (filpchipbga) substrate: Hard multilayer substrate.
4. tbga (tapebga) substrate: the substrate is a one-to-two PCB with soft band.
5. cdpbga (carity down PBGA) substrate: it refers to the encapsulation of a square-shaped low-down chip area (also known as a cavity area) in the center ).
BGA encapsulation has the following features:
1. Although the number of I/O pins increases, the distance between pins is far greater than that of QFP encapsulation, improving the yield rate.
2. Although the power consumption of BGA increases, the electric heating performance can be improved due to the use of controllable collapse chip welding.
3. Low Signal transmission latency, greatly increasing the adaptive frequency.
4. Assemble common surface welding to greatly improve the reliability.
After more than a decade of development, BGA encapsulation has entered the practical stage. In October 1987, Japan's West Iron City (citizen) Company began to develop a plastic ball grid surface array Package Chip (BGA ). Then, Motorola, Compaq and other companies joined the development of BGA. In 1993, Motorola took the lead in Applying BGA to mobile phones. In the same year, Compaq also applied it on workstations and PCs. Until year 56, Intel began using BGA in the computer CPU (Pentium II, Pentium III, Pentium IV, etc.) and chipset (such as i850, this has contributed to BGA application expansion. Currently, BGA has become an extremely popular IC packaging technology. Its global market scale is 2000 RMB in 1.2 billion, and the market demand in 2005 is expected to grow by more than 2000 compared with that in 70%.
V. CSP chip size Encapsulation
With the global demand for personalized and lightweight electronic products, packaging technology has improved to CSP (chip size package ). It reduces the size of the chip encapsulation shape, so that the size of the bare chip is as large as that of the package. That is, the side length of the encapsulated IC is no more than 1.2 times that of the chip, and the IC area is no more than 1.4 times larger than that of the grain (die.
CSP encapsulation can be divided into four categories:
1. Lead Frame Type (in the traditional form of Wire Guide), Representative Manufacturers include Fujitsu, Hitachi, Rohm, and Goldstar.
2. Rigid interposer type (hard interpolation board type), Representative Manufacturers include Motorola, Sony, Toshiba, and Panasonic.
3. Flexible interposer type (soft interpolation board type). The most famous among them is tessera's microbga, and CTS's sim-bga adopts the same principle. Other representative vendors include Ge and NEC.
4. wafer Level package (wafer size package): Unlike the traditional single chip packaging method, wlcsp is a single chip that splits the entire wafer into one chip. It is known as the future mainstream of packaging technology, manufacturers that have invested in R & D include FCT, aptos, Casio, epic, Fujitsu, and Mitsubishi Electronics.
CSP Encapsulation has the following features:
1. meet the increasing requirements of chip I/O pins.
2. the ratio between the chip area and the encapsulation area is very small.
3. greatly shorten the delay time.
CSP packages are suitable for IC with few feet, such as memory stick and portable electronic products. In the future, it will be widely used in information appliance (IA), digital TV (DTV), e-book (e-book), wireless network WLAN/gigabitethemet, ADSL/mobile phone chip, Bluetooth) and other emerging products.
6. MCM multi-chip Module
To solve the problem of low integration and incomplete functions of a single chip, multiple chips with high integration, high performance, and high reliability are used, using SMD technology to form a variety of electronic module systems on high-density multi-layer interconnection substrates, a multi-chip model (MCM) multi-chip module system emerged.
MCM has the following features:
1. Reduced encapsulation latency, making it easy to implement high-speed modules.
2. Reduce the package size and weight of the machine/module.
3. the system reliability is greatly improved.
Chip encapsulation Classification
1. Chip-based loading;
When a bare chip is loaded, its electrode side can be up or down. Therefore, the chip can be divided into two parts: active and inverted, And the wiring surface is up to the right, and vice versa.
In addition, when bare chips are loaded, their electrical connection methods are also different. Some use wire bonding methods, while others use wire-less bonding methods.
2. Based on the chip substrate type;
The purpose of the substrate is to carry and fix the bare chip, and it also has insulation, heat conduction, isolation and protection. it is a bridge connecting internal and external circuits of chips. from the material point of view, there are organic and inorganic substrates. From the structural point of view, the substrates have single-layer, double-layer, multi-layer and composite substrates.
3. Chip sealing or encapsulation;
The encapsulation or sealing method of the bare chip and Its electrodes and leads can be divided into two types: airtightness encapsulation and resin encapsulation. in airtightness encapsulation, according to different packaging materials, they can be divided: metal encapsulation, ceramic encapsulation and glass encapsulation.
The first three categories are classified as Level 1 packages, involving the encapsulation or sealing of bare chips, their electrodes and leads,
4. Chip structure;
According to the chip appearance, the structure is roughly dip, sip, zip, S-DIP, SK-DIP, PGA, among which the first 6 types of Pin insertion type
SOP, MSP, QFP, SVP, lccc, PLCC, soj, BGA, CSP, and the following nine types are surface mount types:
Dip: double-row in-line encapsulation. as the name suggests, this type of pins are arranged on both sides of the chip, which is the most common in Plug-in packages. The Pin pitch is 2.54mm, which has excellent electrical performance and is conducive to heat dissipation and can be made into high-power devices.
SIP: single-column direct encapsulation. this type of pin is arranged on one side of the chip, and its pitch and other features are basically the same as dip. ZIP: Z-pin in-line encapsulation. this type of pins are also arranged on one side of the chip, but the pins are shorter than the SIP, and the pitch and other features are basically the same as the dip.
S-DIP: shrinking double-row in-line encapsulation. This type of pins are arranged on both sides of the chip, with a pin pitch of 1.778mm and chip integration higher than dip.
SK-DIP: narrow double row in-line encapsulation. except that the chip width is 1/2 of DIP, other features are the same as dip. PGA: plug-in encapsulation of needle grid array. the pin is encapsulated in the vertical array at the bottom, just like a needle grid. the pin pitch is 2.54 or 1.27mm, and the number of pins can be as many as hundreds of feet. it is used for high-speed, large-scale, and ultra-large-scale integrated circuits.
Sop: small form encapsulation. Surface Mount encapsulation. Pin terminals are drawn from two sides of the encapsulation, L-shaped. The Pin pitch is 1.27mm.
MSP: Micro-square encapsulation. A surface mount encapsulation, also known as qfi. The Pin terminal is derived from the four sides of the encapsulation and is in the I-shaped shape to the bottom. There is no outward protruding part, and the actual installation occupies a small area, the pin pitch is 1.27mm.
QFP: rectangular flat encapsulation. A surface mount package. The Pin terminals are drawn from two sides of the package in an L-shaped shape. The Pin pitch is 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.3mm, pin can reach more than 300 feet.
SVP: Surface-mounted vertical encapsulation. A surface mount package. Pin terminals are drawn from one side of the package, and the pin is bent at a right angle in the middle. The end of the bending pin is bonded to the PCB and is vertically installed. the actual installation occupies a small area. the pin pitch is 0.65mm and 0.5mm.
Lccc: Unleaded ceramic packaging carrier. It is a surface-mounted package with electrode pad and no pin on the four sides of the ceramic substrate. It is used for high-speed, high-frequency integrated circuit encapsulation.
PLCC: Unleaded Plastic Encapsulation carrier. A Plastic Encapsulation of the LCS. It is also used for high-speed, high-frequency integrated circuit encapsulation.
Soj: small shape J-pin encapsulation. A Surface Mount encapsulation. The Pin terminal is derived from two sides of the encapsulation in a J-shape with a pin pitch of 1.27mm.
BGA: Ball Grid Array encapsulation. A Surface Mount type encapsulation. A two-dimensional array spherical terminal is arranged on the back of the PCB without pin pins. the pitch of the solder ball is usually 1.5, 1.0, and 0.8. Compared with PGA, there is no pin deformation problem.
CSP: Chip-level encapsulation. It is a super-small surface-mounted package. Its pins are also spherical terminals with a pitch of 0.8mm, 0.65mm, 5mm mm, etc.
TCP and so on, the last is the TAB type
TCP: Contains encapsulation. A bare chip is mounted on the insulating band to form cabling and is encapsulated in connection with the cabling. compared with other surface mount packages, the chip is thinner and the pin pitch is smaller, up to 0.25mm, while the number of pins can reach more than 500.
5. Chip-based packaging materials
The chip-based packaging materials are divided into metal encapsulation, ceramic encapsulation, metal-ceramic encapsulation, and Plastic Encapsulation.
Metal encapsulation: metal materials can be rushed and pressed. Therefore, they have advantages such as high encapsulation precision, strict size, convenient mass production, and low price.
Ceramic encapsulation: excellent electrical properties of ceramic materials, suitable for high density encapsulation.
Metal-ceramic encapsulation: it has both advantages of metal encapsulation and ceramic encapsulation.
Plastic Encapsulation: plastic has high plasticity, low cost, simple process, and is suitable for mass production.
The second category belongs to the category of level 2 encapsulation, which is of great use for PCB design,
Common chip packages
