1. pipeline structure Pipeline
-MIPs is one of the simplest architectures, so the university prefers to choose mips architecture to introduce the computing architecture course.
-Arm has Barrel Shifter
Shifter has two sides. On the one hand, it can improve the speed of mathematical logic operations, and on the other hand, it also increases the complexity of hardware. Therefore, it is more efficient than adder/shift register that can accomplish the same function, but it also occupies more chip area.
-MIPS have "Branch delay slot" and "load delay slot"
MIPs uses the compiler to solve the above two problems. Because MIPS was originally designed to use simple RISC hardware, and then rely on compilers and other software technologies to achieve the complete concept of the mips.
2. Instruction structure instruction
-MIPS have 32bit and 64bit architecture, but arm only have 32bit Architecture
Arm11 local 64-bit
-MIPs is an open architecture. You can add your own commands to the developed kernel,
-Arm has 4-bit condition code in every instruction
Arm is like x86 at this point. MIPs also adds the "Conditional move" command to mips iv to improve the pipeline efficiency.
-Arm has pre-and post-increment addressing modes
Auto-increment/decrement on load/store instructions
-In terms of saving code space, mips16 is similar to arm thumb.
3. register
-Because the MIPs kernel has 32 registers (Register) and the arm has only 16, the inherent advantage of this structure design determines the same performance, the chip area and power consumption of MIPs are smaller.
-Arm has a set of special purpose register cp0-cp15, can use MCR, MRC and other command control; correspondingly, MIPS also has cp0 0-30, use mfc0, mtc0 Command Control.
-Register banking in arm. r8-r12 FIQ mode; R13: SP R14: LR
I don't feel any benefit from banked register.
-MIPS has a hard-wired-to-zero register, but arm not
MIPs use register $0 for zero
4. Address Space
-The starting address of MIPs is 0xbfc00000, which has a size limit of 4 Mbyte. However, generally, MIPS chips adopt some methods to solve this problem.
Arm does not have this problem.
The starting address of mips24k is changed to 0xbf000000, and now there is 16 Mbyte space.
-MIPS don't have to turn paging on to enable the cache.
MIPs have the address space for both cache and un-Cache
But arm need enable/disable Cache
5. Function
-Float Point: mips64 has.
Arm's support for FP is limited, and usually not supported ded, and it is a 32 bit architecture
-Arm use JTAG and MIPS use ejtag. Both debug tools are supported. The usage is similar.
6. Performance
-Performance Comparison: It is difficult to tell who is better or worse because of the large difference. In my personal experience, the performance of mips4 K is basically the same level as that of ARM9. however, the performance of arm4.
Similarly, the performance of the 32bit mips24k is much higher than that of the mips4k, and it should be better than that of the ARM9.
Because we have never used arm11 or mips34k chips, we can't compare them, but it seems that these two chips are of the same level.
Cortex-A8 and MIPS 74k are the latest design, should be similar to performance.
7. Application
-For applications above MHz, it is difficult to find products using ARM architecture.
The mips architecture is rarely used in MHz or below MHz, which is precisely the main market of arm.
-Arm is widely used in mobile phones, PDAs, and other portable consumer electronics because of its low power consumption. MIPs is widely used in Residential Gateway, cable modem, and cable set-top boxes. Due to the development of MIPS multi-core, large gateway devices also use it.
-Arm uses hard core authorization; MIPS uses soft core authorization. You can configure it as your own product.
8. Future Development
-The next generation of arm goes towards a multi-core structure, while the next-generation core of MIPs is switched to the hardware multi-thread function (multithreading)
MIPs's multi-threading technology is similar to Intel's hyperthreading technology. From the current development perspective, multiple kernels have the upper hand.
2008.12.21, however, it cannot be inferred that the development of MT on MIPS is not good. After all, the application of MIPs is mostly in the embedded field, and the advantages of low power consumption and small chip area of MT play a role.
2008.12.29: MIPs is not only multithreading. In fact, many mips cpu manufacturers now have multi-core MIPS CPUs, such as cavium, Broadcom, infineon, china's dragon core also has multi-core products.
2009.6.11: MIPS's multi-core development is obviously better than arm's. From the perspective of cavium and RMI, a large number of applications of the company's products can be seen.
9. Summary
We feel that arm and MIPS have different designs in the early stage. However, with the development of technology, we will use them to develop strengths and circumvent weaknesses. For example, arm11 and MIPS r1000 use many of the same technologies. It seems that the same thing is true for all of them.