Compilation Basics (ii)

Tag: Flag register interrupt instruction Direct addressing table

1. RET directive

RET instruction with the data in the stack, modify the contents of the IP, so as to achieve near-transfer!

When the CPU executes the RET instruction, the 2-step Operation:i>, (IP) = ((ss) *16 + (sp)), ii>, (sp) = (sp) +2

The CPU executes the RET instruction, equivalent to: Pop IP;

CPU executes RETF instruction, equivalent to pop IP pop CS;

2. Call Label

When the CPU executes the call command, the following 2 steps are performed:

(1), (sp) = (sp)-2 ((ss) *16+ (sp)) = (IP):

(2), (IP) = (IP) + 16-bit displacement;

3. mul directive

Mul is a multiplication instruction, multiplied by 2 numbers, either 8-bit or 16-bit;

The AX register is generally operated on;

4. Flag Register

Flag (or flag register) is the last register to be learned;

The 8086CPU flag registers are 16-bit, where the information stored is often referred to as the program status Word (PSW);

8086CPU instruction set, add, Sub, Mul, Div, Inc, or, and and so on are operational instructions, affecting the flag register;

MOV, push, pop, and so on, are mostly transmission instructions, no influence on the flag register;

flag is a bitwise function, each bit of it has a special meaning, record the specific information ;

Its structural model diagram:

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Flag 1, 3, 5, 12, 13, 14, 15 bits are not used in 8086CPU, do not have any meaning, and 0, 2, 4, 6, 7, 8, 9, 10, 11 bits have a special meaning.

(1), ZF: 0 flag bit, it records the implementation of the relevant instructions, the result is 0,zf=1, the results are not 0,zf=0;

Cases:

mov ax, 1sub ax, 1

After the execution of the instruction, the result is 0, then zf=1;

(2), PF: Parity sign, record instruction after execution, the results of all bits in the number of 1, for an even number of pf=1, for odd number of, pf=0;

(3), SF: symbol sign, record instruction after execution, the result is negative, sf=1, the result is positive, sf=0;

(4), CF: Carry flag bit, to the highest bit of carry, put into this register;

(5), of: Overflow flag, for the signed operand, the overflow bit is retained here;

The difference between CF and of:

CF is a symbolic bit that is meaningful for the operation of unsigned numbers, and is a sign for symbolic operations;

(6), DF: direction sign bit;

PUSHF: Press the value of the flag register to stack;

Popf: POPs data from the stack and feeds into the flag register;

5. Interruption

Interrupt is an important technique for CPU to deal with external emergencies;

Interrupt vector table: The CPU uses a 8-bit interrupt type code to find the corresponding interrupt handler's entry address through the interrupt vector table;

A interrupt vector table is stored in 1024 cells from memory 0000:0000 to 0000:03FF;

Single-Step interrupt: After the CPU executes an instruction, if the TF bit of the flag register is detected to be 1, a single-step interrupt is generated, the interrupt process is triggered, and the interrupt type code of the single-step interrupt is 1;

6, int

int: internal interrupt, int n,n is the interrupt type code, n is the interrupt process, the interrupt vector table is placed in the address, through n this ordinal index to this address, the execution of the interrupt specified format----> interrupt process;

BIOS and DOS provide interrupts, all using AH to pass the internal subroutine number;

In DOS programming, the default ends with "$" ("$" itself does not appear, only acts as a boundary);

7. Port

The CPU can read and write directly to 3 Local data:i>, the register;ii> inside the CPU, the memory unit;iii>, the port;

Through the port, the computer can directly access the hardware, through the port, the computer can and the network transfer data to each other;

There are only 2 read and write instructions for the port: In and out are used to read data from the port and write data to the port;

SHL: Logical left SHIFT instruction, the last one written to CF, the lowest bit with 0 supplement;

SHR: Logical Right SHIFT instruction, the last one written to CF, the highest bit with 0 supplement;

8, external interruption

External SMS: Can be shielded interrupt and non-shielded interrupt, with the flag register if closely related;

Port and interrupt mechanism, which is the basis of CPU I/O;

9. Summary of instruction System

(1), Data transmission instructions: MOV, push, pop, PUSHF, Popf .... A single data transfer between the register and the memory/register is implemented;

(2), arithmetic operations directives: Add, Sub, ADC, SBB, Inc, DEC, CMP .... Arithmetic operation for register and memory data;

Their execution results affect the sign register: SF, ZF, SF, pf, af ....

(3), logical instruction: And, or, not, SHL, shr ...

The calculation results (except not) all affect the flag register;

(4), transfer instruction: can modify Ip,cs;

i>, unconditional transfer instructions: JMP

ii>, conditional transfer directive: jcxz, je, JB, ja ....

iii>, cyclic instruction: loop;

iv>, Process: Call, ret, RETF;

V>, interrupts: int, iret

(5), processor control instructions .....

(6), string processing instructions: MOVSB, cmps ....

10. Direct Addressing Table

idea: Establish a table, in the table to deposit the data to be found, in order to speed up the calculation of the use of table-checking method;

according to the stored address, it is convenient to implement different subroutine calls;

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Compilation Basics (ii)