Comprehensive Analysis of NP + ASIC core switch design technology

Core switches are worth learning. Here we mainly introduce the NP + ASIC core switch design technology. Currently, several common feasible technologies that constitute the core switch design system are as follows:

1. General CPU

The advantage of general-purpose CPU is that the function is easy to expand and can theoretically implement any network function, but the disadvantage is that the performance is low. Therefore, in the core switch design model, CPU is generally used only for control and management of network devices.

2. ASIC Chip

ASIC chips can use hardware to implement a variety of frequently-used network functions with extremely high performance. A single chip can achieve processing capabilities of hundreds of megabytes or more. However, once the ASIC chip is developed, it is difficult to expand other applications. Adding new features requires a long development cycle for the chip R & D Company. Therefore, ASIC chips are most suitable for processing various mature and traditional functions in the network.

3. FPGA Field Programmable Gate Array

FPGA is a Gate Array Chip that can be repeatedly programmed, erased, used, and implemented with different software without moving peripheral circuits. However, due to technical limitations, FPGA still has limited processing capabilities so far, making FPGA unable to process multiple protocols at the same time.

4. NP (network processor)

NP retains the high-performance data processing feature of ASIC. At the same time, NP uses a number of parallel-running micro-code processors to implement complex multi-service expansion through micro-code programming. The disadvantage of NP technology is that network vendors need to invest a large number of related developers when using NP for product design. At the same time, there are still some differences between NP performance and ASIC.

Undoubtedly, the analysis of several design system technologies shows that the system design method using NP + ASIC is the most perfect choice. NP is close to ASIC's high efficiency and ensures the high performance provided by multiple businesses. It still maintains the requirement of core switches for powerful processing capabilities and has become the most important development direction in core switch design.

Data plane, control plane, and management plane completely separated

The core switch processes various types of data on different interfaces, for example, L2/L3/ACL/QoS/multicast/security protection and other network functions are divided into the data plane of the core switch, the control plane is used to control the operation of various network protocols, such as controlling the normal operation of OSPF, ARP, STP, and other protocols, the management plane function provides network administrators with various management interfaces for managing devices through Telnet, Web, SSH, SNMP, and RMON. Why do we need to separate the data plane, control plane, and management plane?

Assuming that these planes do not perform any separation, and the data plane and control and management plane use the shared host resources, the result is obvious, in big data traffic and complex application environments, the data plane may consume a vast majority of resources due to heavy daily tasks, which is undoubtedly disastrous for the entire core switch system, therefore, the data plane must be strictly separated from the control plane and management plane.

The structure model of data plane, control plane, and management Plane Separation ensures that a large amount of data processing does not affect management and control. In the complex routing and environment conditions, the control plane does not affect the management plane and ensures the system security and stability.