Conversion of physical and virtual addresses in wince6.0

Reference: http://blog.163.com/zhouyi_sky/blog/static/38245528200881122757210/

View the address ing table in oemaddrtab_cfg.inc

;------------------------------------------------------------------------------
;
; Table format
; Cached address, physical address, size
;------------------------------------------------------------------------------

G_oaladdresstable

DCD 0x80000000, 0x30000000, 64; 32 mb dram Bank 6
; DCD 0x82000000, 0x08000000, 32
DCD 0x84000000, 0x10000000, 32; ngcs2: PCMCIA/pccard
DCD 0x86000000, 0x18000000, 32; 32 MB srom (SRAM/ROM) Bank 3
DCD 0x88000000, 0x20000000, 32; 32 MB srom (SRAM/ROM) Bank 4
DCD 0x8a000000, 0x28000000, 32; 32 MB srom (SRAM/ROM) Bank 5
DCD 0x8c000000, 0x08000000, 32; 32 MB srom (SRAM/ROM) Bank 1
DCD 0x90800000, 0x48000000, 1; memory control register
DCD 0x90900000, 0x49000000, 1; USB Host register
DCD 0x90a00000, 0x4a000000, 1; interrupt control register
DCD 0x90b00000, 0x4b000000, 1; DMA control register
DCD 0x90c00000, 0x4c000000, 1; clock & Power register
DCD 0x90d00000, 0x4d000000, 1; LCD control register
DCD 0x90e00000, 0x4e000000, 1; NAND Flash control register
DCD 0x90f00000, 0x4f000000, 1; camera control register
DCD 0x91000000, 0x50000000, 1; UART control register
DCD 0x91100000, 0x51000000, 1; PWM timer register
DCD 0x91200000, 0x52000000, 1; USB device register
DCD 0x91300000, 0x53000000, 1; watchdog timer register
DCD 0x91400000, 0x54000000, 1; IIC control register
DCD 0x91500000, 0x55000000, 1; IIS control register
DCD 0x91600000, 0x56000000, 1; I/O port register
DCD 0x91700000, Zero X 57000000, 1; RTC control register
DCD 0x91800000, 0x58000000, 1; A/D convert register
DCD 0x91900000, 0x59000000, 1; SPI register
DCD 0x91a00000, 0x5a000000, 1; SD interface register
DCD 0x92000000, 0x00000000, 32; 32 MB srom (SRAM/ROM) Bank 0
DCD 0x00000000, 0x00000000, 0; end of table

;------------------------------------------------------------------------------

For an ARM processor, the physical space it can access is 4 GB. In wince, the 4 GB physical address space in arm will be mapped to a virtual memory space of MB. Oemaddresstable is a ing table of 4 GB physical address space to MB virtual address space in wince kernel. The code above clearly shows that the physical address is indeed compressed in the space of m with the address 0 x as the header.

In BSP, oemaddresstable is defined to describe the physical space that can be accessed in the system, the corresponding virtual address space, and the size. This table will be sent to MMU when the wince system starts. The specific table in BSP should be startup in OAL. in S, the starting address of oemaddresstable will be put into the R0 register, and then jump to the kernelstart. kernelstart will use oemaddresstable to complete MMU initialization. After wince is started, you can only access the virtual address space.

However, the address I see in s2440.h in BSP is different from the physical address above, for example:

# Define memctrl_base 0xb0800000 // 0x48000000

In oemaddrtab_cfg.inc:

DCD 0x90800000, 0x48000000, 1; memory control register

One is 0xb0800000, while the other is 0x90800000 in oemaddrtab_cfg.inc. We found that the virtual addresses of all s2440.h are added with 0x20000000 based on the virtual addresses of oemaddrtab_cfg.inc. This offset happens to be a static ing. The virtual address has a cache and no cache offset. MMU initializes the address ing by oemaddrtab_cfg.inc's oemaddresstable,