CPU Design-->CPU instruction design and whole logic analysis

CPU instruction design, in addition to naming, it is more important to analyze how the instructions can be achieved. For the CPU structure of Figure 3 1, if the instruction is pre-placed in the Irom, then the instruction is executed with one piece of irom removed from the IR instruction register and provided to the control for analysis execution. How each instruction is transformed into a machine action, the designer of the CPU must be careful to analyze and plan. This process is called the whole operation of the instruction analysis, short instruction full analysis.

For the structure of figure 3-1, we can try to design some assembly instructions that are represented by symbols, then how to implement these assembly instructions and analyze them in detail. The binary number representation of the assembly instruction is the machine instruction. Assembly instructions and machine instructions are one by one corresponding. The whole process of the assembly instruction is analyzed, that is, the machine instruction of the CPU is analyzed.

We envisage some of the following directives, and give each instruction a unique 5-bit code, according to figure 3-1, based on the change of the Beat and the function analysis of the instruction, we can find a series of CPU basic action of each instruction.

1. LDA directive

The first instruction function we want to design is to send the contents of the specified data storage unit R to the accumulator da. The mnemonic symbol for this instruction is LDA, the number is 00001, and the format of the assembly instruction is LDA R.

Assuming that the program counter PC points to lda R at the address of the program memory, the metronome initial value is 0, then the sequential action step to execute this instruction should be as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 00001, let the sign lda=1, and the low 11 bits of IR send Mar, the metronome plus one;

(3) The Beat is 2 o'clock, and the Mark Lda=1, then pc+1, metronome plus one;

(4) The Beat is 3 o'clock, and the Mark Lda=1, the Dram sent Da, metronome plus one;

(5) The Beat is 4 o'clock, let the sign lda=0, the metronome resets to zero.

2. ADD command

The function of the assembly instruction add R is set to add the data from the R unit in the data memory to the accumulator DA, and the result is sent to the accumulator da. The number of add is set to 00010.

Assuming the PC points to the address where add R is located, the metronome initial value is 0, then the sequential action steps of the instruction add R are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 00010, let the sign add=1, will be low 11 bit to send the Mar, the metronome plus one;

(3) The Beat is 2 o'clock, and the Mark Add=1,pc+1, the metronome plus one;

(4) The Beat is 3 o'clock, and the Mark Add=1, the DRAM is sent to register B, the metronome plus one;

(5) The Beat is 4 o'clock, and the Mark Add=1, will da send register a, metronome plus one;

(6) The Beat is 5 o'clock, and the Mark Add=1, will a+b send DA, metronome plus one;

(7) The Beat is 6 o'clock, let the sign add=0, the metronome resets to zero.

Because the bus can not propagate multiple data at the same time, so a, B registers can not receive data at the same time, but divided into 2 beats, a beat bus transmission data memory data, another beat bus transfer accumulator da data.

3. Out instructions

It is assumed that the function of assembly instruction out R is to send the data of the data Memory R unit to the output register out output. The instruction number for out is 00011.

Assuming that the PC points to an out r in the storage address of the program memory, the metronome initial value is 0, then the instruction out r continuous action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 00011, let the sign out=1, will be low 11 bit to send the Mar, the metronome plus one;

(3) The Beat is 2 o'clock, and the Mark Out=1,pc+1, the metronome plus one;

(4) The Beat is 3 o'clock, and the Mark Out=1, the DRAM is sent out register, the metronome plus one;

(5) The Beat is 4 o'clock, let the sign out=0, the metronome resets to zero.

4. Sdal directive

Figure 3 1 of the CPU structure of the device without external data input, in order to input the data, only consider to write the data into the instruction, so that when the instruction executes, the data can be sent to register or memory. The function of the Assembly directive Sdal N is to send the 8-bit n of the instruction to the lower 8 bits of the accumulator da. The instruction number of the Sdal is 00100.

Assuming that the PC points to Sdal N in the storage address of the program memory, the metronome initial value is 0, then the instruction Sdal n continuous action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, if the IR high 5 bit is 00100, let the sign sdal=1,pc+1, metronome plus one;

(3) The Beat is 2 o'clock, and the sign sdal=1, the IR low 8 bit to send da low 8 bits, the metronome plus one;

(4) The Beat is 3 o'clock, let the sign sdal=0, the metronome resets to zero.

5. Sdah directive

Since we are designing a 16-bit CPU, the data should be 16-bit. But an instruction is only 16 bits, except the position of the instruction number, only 11 bits. If you use an instruction to indicate the data being fed, it is 11 bits at most. To solve the 16-digit problem, we designed two linked instructions. The function of the Assembly directive Sdah N We envision is to send the 8-bit number in this instruction to the high 8 bits of the accumulator da. This allows the accumulator da to obtain a 16-bit binary number together with the preceding sdal instruction. The instruction number of the Sdah is 00101. The following is a sdah n instruction for the whole change analysis.

Assuming the PC points to Sdah N at the address of the program memory, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, if the IR high 5 bit is 00101, let the sign sdah=1,pc+1, metronome plus one;

(3) The Beat is 2 o'clock, and the sign sdah=1, the IR low 8 bit to send da high 8 bits, the metronome plus one;

(4) The Beat is 3 o'clock, let the sign sdah=0, the metronome resets to zero.

6. STR command

The function of the assembly instruction str R is to send the accumulated da data to the R storage unit of the data memory dram. The instruction number of STR is 00110.

Assuming that the PC points to the program memory address of STR R, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, if the IR high 5 bit is 00110, let the sign str=1, the low 11 bits of IR sent to Mar, the metronome plus one;

(3) The Beat is 2 o'clock, and the Mark Str=1,pc+1, the metronome plus one;

(4) The Beat is 3 o'clock, the DA is sent to DRAM, the metronome plus one;

(5) The Beat is 3 o'clock, let the sign str=0, the metronome resets to zero.

7. Sub instruction

The function of the assembly instruction Sub R is set to subtract the data from the R unit in the data memory from the accumulator DA, and the result is sent to the accumulator da. The sub's number is set to 00111.

Assuming that the PC points to the address where Sub R is located, the metronome initial value is 0, then the sequential action steps of the instruction Sub R are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 00111, let the sign sub=1, will be low 11 bit to send the Mar, the metronome plus one;

(3) The Beat is 2 o'clock, and the Mark Sub=1,pc+1, the metronome plus one;

(4) The Beat is 3 o'clock, and the Mark Sub=1, the DRAM is sent to register B, the metronome plus one;

(5) The Beat is 4 o'clock, and the Mark Sub=1, will da send register a, metronome plus one;

(6) The Beat is 5 o'clock, and the Mark Sub=1, will be a-B send da, metronome plus one;

(7) The Beat is 6 o'clock, let the sign sub=0, the metronome resets to zero.

8. JMP directives

The first thing we envision is simple data transfer or operation instructions, it is very difficult to write programs using only these instructions. We can run into the branch structure, the loop structure and the subroutine call structure, and so on, we must design the corresponding instruction for these structures, otherwise we can not complete the necessary structure of the programming. Unconditional Jump Assembly Instruction JMP R is one of the indispensable instructions.

The function of the envisioned Assembly directive, JMP R, is: After executing this instruction, it goes to the R unit of program memory for execution. The JMP instruction number is set at 01000.

Still assuming that the PC points to jmp R in the program memory address, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01000, the IR low 11 bit to send the PC, the metronome plus one;

(3) The Beat is 2 o'clock and the metronome is reset to zero.

9. JZ directive

For a branch program structure, you must have conditional transfer directives to determine. The function of assembly instruction JZ R is: If the accumulator da=0, then after this instruction execution completes, goes to the program memory the R unit takes the instruction executes. The number of the JZ directive is set at 01001.

Assuming the PC points to jz R at the address of the program memory, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01001, and da=0, then the IR low 11 bit to send the PC, the metronome plus one;

(3) The Beat is 2 o'clock and the metronome is reset to zero.

10. JN directive

The function of assembly instruction JN R is: If the accumulator da<0, then after this instruction execution completes, goes to the program memory the R unit takes the instruction executes. The number of the JN directive is set at 01010.

Assuming the PC points to the address of the Jn R, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01001, and da<0, then the IR low 11 bit to send the PC, the metronome plus one;

(3) The Beat is 2 o'clock and the metronome is reset to zero.

It should be pointed out that in the case of a limited number of cases, judge whether da is less than 0, can not use da<0 expression, but should use the highest digit is not one to judge. This is because the design of Verilog HDL Positive negative number, is the 32nd bit or 64 bit for 1 No, when we designed the digital bit is not 32 or 64 o'clock, Verilog HDL will be less than 0, which can not be judged positive or negative.

11. Call command

It is necessary to write the instructions of the software program to invoke the subroutine. So we have to consider designing subroutine invocation directives. The function of assembly instruction call R is: After executing this instruction, we will go to the R unit of program memory to execute the instruction. The call instruction is numbered 01011.

Assuming that the PC points to the assembly instruction call R at the address of the program memory, the metronome initial value is 0, then the sequential action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01011, set the instruction flag call=1, save the PC to the stack, the metronome plus one;

(3) The Beat is 2 o'clock, and the instruction Mark Call=1, the IR low 11 bits to send the PC, the metronome plus one;

(4) The Beat is 3 o'clock, let the sign call=0, the stack pointer moves to the top of the stack, the metronome resets to zero.

12. RET directive

Returning instructions from the called subroutine RET is also an indispensable part of the program design. The function of assembly instruction RET is: After this instruction is executed, return to the next instruction that called the subroutine before executing. The RET instruction is numbered 01100.

Also assume that the PC points to RET in the program memory address, the metronome initial value is 0, then the continuous action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01100, the instruction flag ret=1, the stack pointer moves back, the metronome adds one;

(3) The Beat is 2 o'clock, and ret=1, the top value of the stack is sent to the PC, the metronome plus one;

(4) The Beat is 3 o'clock, let the sign ret=0, the stack pointer moves to the top of the stack, the metronome resets to zero.

13. Mult directive

In the program design, the multiplication or division can be accomplished by the addition and subtraction instruction through the cyclic structure. However, programs written in this way complete multiplication or division at a relatively slow speed. For this we still want to design multiplication and division instructions here. If we design the multiplication assembly instruction Mult R, its function is defined as: the data storage unit R read data is multiplied by the accumulator DA, the result is low 8 bits into the accumulator DA, the high 8 bits are fed into the output register out. Set the multiplication instruction mult number is 01101.

Assuming that the PC points to the assembly instruction Mult R in the program memory address, the metronome initial value is 0, then the continuous action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01101, let the instruction Mark Mult=1, will be low 11 bits to send the Mar, the metronome adds one;

(3) The Beat is 2 o'clock, and the instruction Mark Mult=1, let pc+1, metronome plus one;

(4) The Beat is 3 o'clock, and the instruction Mark Mult=1, the DRAM is sent to register B, the metronome plus one;

(5) The Beat is 4 o'clock, and the instruction Mark Mult=1, will da send register a, metronome plus one;

(6) The Beat is 5 o'clock, and the instruction Mark Mult=1, will a*b low 8 bits to send DA, will a*b high 8 bit to send out, metronome plus one;

(7) The Beat is 6 o'clock, let the instruction Mark Mult=0, the metronome resets to zero.

14. DIVI directive

The design of the division operation instruction is basically similar to the multiplication operation instruction. The function of assembly Division instruction Divi R is to divide the value of the accumulator da by the number of r elements in the data memory, and the result quotient into the accumulator, the remainder into the output register out. The instruction Divi is numbered 01110.

Assuming that the PC points to the assembly instruction Divi R in the program memory address, the metronome initial value is 0, then the continuous action steps are as follows:

(1) The Beat is 0 o'clock, irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 01110, let the instruction Mark Divi=1, will be low 11 bits to send the Mar, the metronome adds one;

(3) The Beat is 2 o'clock, and the instruction Mark Divi=1, let pc+1, metronome plus one;

(4) The Beat is 3 o'clock, and the instruction Mark Divi=1, the DRAM is sent to register B, the metronome plus one;

(5) The Beat is 4 o'clock, and the instruction Mark Divi=1, will da send register a, metronome plus one;

(6) The Beat is 5 o'clock, and the instruction Mark Divi=1, A/b low 8 bits to send DA, the remainder is sent out, the metronome plus one;

(7) The Beat is 6 o'clock, let the instruction Mark Divi=0, the metronome resets to zero.

15. STP directives

The shutdown instruction should be an indispensable instruction in the CPU design. The function of assembly directive STP is: Stop the metronome plus one action.

Assuming the PC points to the assembly directive STP in the program memory address, the metronome initial value is 0, then the continuous action steps are as follows:

(1) irom→ instruction register IR, metronome plus one;

(2) The Beat is 1 o'clock, the IR high 5 bit is 11111, the metronome resets to zero.

We are thinking about designing these 15 directives for the time being, which are instructions that no CPU can be missing. As the requirements of the task, the general CPU will add some instructions, this will make their own design of the CPU more suitable. This detailed analysis of the assumptions is the basis for our CPU design process. To be able to create your own CPU independently, you must master the detailed analysis of the command system and determine the steps that each instruction executes to become an expert in designing the CPU.

CPU Design-->CPU instruction design and whole logic analysis