Danger of electrostatic discharge

In the first year as an electronic engineering student, you've been told repeatedly that electrostatic discharge (ESD) is a phenomenon of electrical transients and poses a serious threat to electronic circuitry.

The most common reason for electrostatic generation is that the friction between the two different materials causes the charge to accumulate on the friction surface. The use of handheld and wearable electronic devices continues to grow, involving one of the friction surfaces that are human skin. In fact, the human body is the biggest threat of electrostatic discharge. Many people's memories have been the 6KV electrostatic release of the experience, but sometimes its electrostatic discharge voltage can be as high as 15KV. While most low-voltage electrostatic discharges do not cause detection, they can cause devastating damage to unprotected components and circuits.

　　

The green part of the figure is the part that is likely to experience current overload (too much current, electrostatic, surge), so protective components may be needed to ensure reliable performance and meet regulatory standards.

ESD is characterized by fast rise times, high peak voltages and instantaneous currents up to 30A (according to the iec61000-4-2,4 level), which melts silicon and conductors. See figure above. However, the effects of ESD are not always particularly noticeable, and the damage caused by ESD can in fact be divided into 3 levels.

1. Soft fault: The current generated by ESD can change the state of internal logic, causing the system to shut down or behave abnormally, and damage the data stream. While this effect is temporary, it may cause the system to communicate slower and may require a system reboot when the system is locked.

2. Potential defects: ESD may damage some of the components or circuits that will function, although the system can continue to operate, but this type of flaw can reduce the system life and premature failure.

3. Catastrophic failure: ESD can damage some critical components or circuitry, causing the system to malfunction or even fail to start.

As the size of the IC continues to shrink, the probability of electronic circuit damage is increasing. Many ICS operate at low voltages, and their structural and conductive pathways often fail to withstand the instantaneous high voltages and currents that are caused by ESD. In higher-frequency communication devices for high-speed communications, it is increasingly challenging to propose a solution that does not cause damage to stringent signal integrity requirements at higher rates, and the internal voltage of the ESD suppressor is not too high, so that the data communication signal is not affected.

IC designers will include a limited amount of ESD suppression in their chips to help prevent electrostatic damage during manufacturing or assembly. However, the protections it joins may not be sufficient to protect the chips and circuitry from ESD attacks in use. Many electronic products, especially portable electronic products, are mostly used in uncontrolled environments and may accumulate electrical charges in the process of carrying them. These accumulated energies are released when the two devices are in contact, usually when the user touches the input output of the connector.

　　

End product designers need to consider adding ESD suppressors to their circuits. They also need to consider potential coupling paths that allow ESD to enter their devices and circuits. The weak link determines the scope of the ESD suppressor installation. Ultimately, the designer also chooses the appropriate ESD suppressor based on the product type, the sensitivity of the component, and the characteristics of the use environment.

They need to find a balance between ESD protection and operational requirements, while also considering the level of threat. Of course, it is also necessary to consider the electrical characteristics, form and package types required for potential suppressors.