Differences between SRAM and SDRAM

DRAM, Dynamic Random Access Memory, must be constantly refreshed to save data. In addition, the row and column addresses are reused, and many of them have the page mode.

SRAM, static random access memory. When powered on, data does not need to be refreshed, and data will not be lost. In addition, it is generally not reused by row and column addresses. SDRAM, synchronous DRAM, that is, data read/write requires clock synchronization.
DRAM and SDRAM have a large capacity due to technical issues. However, the speed of reading and writing is not as high as that of SRAM, but now the speed of SDRAM is also very fast, and the clock seems to have been 150 MB. The read/write cycle is smaller than 10ns. The actual throughput is reduced despite the high frequency of running the SDRAM. Take pc133 as an example. Its clock cycle is 7.5ns. When cas
When latency = 2, it needs to complete 8 burst read operations in 12 cycles, and 8 burst write operations in 10 cycles. However, if you access the bank in an alternate way, the SDRAM can perform a read/write operation in each cycle (except for the refresh operation, of course ). In fact, the current mainstream high-speed memory is ssram (synchronous SRAM) and SDRAM (synchronous DRAM ). Currently, the maximum capacity of ssram that you can buy is 8 Mb/piece, and the maximum operating speed is 166 MHz. The maximum size of the SDRAM that you can buy is 128 MB/piece, the maximum operating speed is 133 MHz.

Static random access memory is a type of semiconductor memory. Static means that data stored in SRAM will not be lost if no power is lost. Unlike dynamic RAM (Dram), DRAM requires periodic refresh operations. Then, we should not associate SRAM with read-only memory (ROM) and flash
Memory is obfuscated because SRAM is a kind of volatile memory that can maintain data only when the power supply is continuously supplied. "Random Access" means that the content of the memory can be accessed in any order, regardless of the location of the previous access.

Each bit in the SRAM is stored in four transistors, which form two cross-coupled backbones. This storage unit has two stable states, usually 0 and 1. In addition, two access transistors are required to control access to the storage units during read or write operations. Therefore, a storage space usually requires six Enis. The symmetric circuit structure makes the access speed of SRAM faster than that of dram. Another reason why SRAM is faster than DRAM access is that it can receive all the address bits at a time, while DRAM uses a line address and column address multiplexing structure.

The SRAM should not be confused with the SDRAM. The SDRAM represents synchronous DRAM (synchronous
DRAM), which is completely different from SRAM. It should not be confused with psram. psram is a dram disguised as SRAM.

From the transistor type, SRAM can be divided into bipolar and CMOS. In terms of functions, SRAM can be divided into asynchronous SRAM and synchronous SRAM (ssram ). Asynchronous SRAM access is independent of the clock, and data input and output are controlled by address changes. All accesses to the synchronized SRAM are started along the rise/fall of the clock. Address, data input, and other control signals are related to clock signals.

DRAM: Dynamic Random Access to memory. data can be stored only after constant refreshing. In addition, the row and column addresses are reused, and many of them have the page mode.

SRAM: static random access memory. When powered on, data does not need to be refreshed and will not be lost. In addition, it is generally not reused by row and column addresses.

SDRAM: synchronous DRAM, that is, Data Reading and Writing requires clock synchronization. Different Storage unit structures lead to different capacities. A dram storage unit requires a transistor and a capacitor (excluding the row-read amplifier), and an SRAM storage unit requires about six transistors. DRAM and SDRAM have a large capacity due to technical issues, but the read/write speed is not as high as that of SRAM. One is static, the other is dynamic, and the static one is to use a bistability trigger to store information, while the dynamic one is electronic, which should be refresh from time to time.

Memory (I .e. random Memory RAM) can be divided into static random memory SRAM and dynamic random Memory DRAM. We often say"
Memory refers to dram. But there is little access to SRAM.

SRAM is actually a very important type of memory, which is widely used. The speed of SRAM is very fast, which can be guaranteed during fast reading and refresh.

Data Integrity. The internal structure of the SRAM uses a bi-stable circuit to store data. The circuit structure of SRAM is very complex. Creating an SRAM of the same capacity is much more costly than dram. That is why it restricts its development. So at present, the SRAM is basically only used for CPU
Internal level-1 cache and built-in level-2 cache. Only a small number of network servers and routers can use SRAM.