the recent work involves anroid porting to 6410. Since there is only one Development Board for others to debug first, I will first make up the basics of Flash Driver.
first, the number of accesses. In theory, the MLC architecture can only handle about 10 thousand data writes, while the SLC architecture can withstand about 0.1 million data writes, 10 times that of MLC. This 10 thousand refers to the number of data writes, not the total number of data writes and reads. The number of data reads has a certain impact on the flash memory life, but it is not as serious as writing.
second, the read speed and write speed. There are still some misunderstandings here. All the flash memory chips read, write, or erase data are completed under the flash memory control chip, the speed of the flash memory control chip determines the speed at which data is read, erased, or re-written in the flash memory. The SLC technology was developed much earlier than the MLC technology, and the matching control chip technology is very mature.
the third is power consumption. The SLC architecture stores only 1 bit of data per cell, so there are only two levels of high and low, and the 1. 8 V voltage can be used to drive. In the MLC architecture, each cell needs to store multiple bits, that is, the level must be divided into at least four levels (storing 2 bits). Therefore, a voltage of 3.3v or above is required for the drive.
fourth, error rate. In one read/write, SLC only has 0 or 1 states. This technology provides fast Program programming and reading, simply put, each cell is like a switch used in our daily life. It only has two states: On and off. It is very stable. Even if one cell is damaged, it will not affect the overall performance. In one read/write, MLC has four States (taking 2bit access per cell as an example), which means that the MLC storage needs to control the charging voltage of each storage unit more accurately, read/write operations require a longer charging time to ensure data reliability. It is no longer a simple switch circuit, but to control four different states, which has great requirements on the error rate and stability of the product, and once an error occurs, therefore, MLC has a higher requirement on the manufacturing process and control chip.
fifth, manufacturing costs. MLC technology originally stores only 1 bit of data per cell, And now each cell can store 2 bit or more data, which is achieved without increasing the storage volume, therefore, the manufacturing cost of mlc nand flash with the same capacity is much lower than that of slc nand Flash.
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You can see whether a flash is MLC or SLC in the Flash specification. The software can be determined directly from the read flash ID information. Specifically, in Samsung's software, the following methods are used:
If (NAND-> cellinfo> 2) & 0x3) = 0) {// exactly IO3 io2 is 00
Nand_type = maid;
.......
}
Else
{
Nand_type = initi_nand_type_mlc;
}
Unless a cell uses a 2-level SLC, all the others are MLC.