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Nor and NAND are two major non-loss flash technologies on the market. Intel first developed nor Flash technology in 1988, which completely changed the original integration of EPROM and EEPROM.
The world. Next, in 1989, Toshiba published the NAND Flash structure, emphasizing reducing the cost per bit and higher performance, and easily upgrading it through interfaces like disks. However, after more than a decade, a considerable number of hardware engineers are still confused about nor and NAND Flash.
"NAND memory" can often be used with "nor memory. Many insiders do not know the advantages of NAND Flash compared with nor, because in most cases, Flash is only used to store a small amount Code At this time, nor flash memory is more suitable for some. Nand is an ideal solution for high data storage density.
Nor features in-chip execution (xip, execute in place ). Program It can be run directly in flash memory without having to read the code into system Ram. Nor transmission efficiency is very high, in 1 ~ The small size of 4 MB has high cost efficiency, but the low write and erase speeds greatly affect its performance.
The NAND structure provides a very high unit density, achieves a high storage density, and writes and erases quickly. The difficulty of using NAND lies in Flash management and special system interfaces.
Performance Comparison Flash flash memory is a non-loss-prone memory. It can be used to erase and re-program memory unit blocks called blocks. Write operations on any flash device can only be performed in an empty or erased unit. In most cases, the flash device must be erased before writing. It is very easy for the NAND device to perform the erasure operation, and nor requires that all the bits in the target block be written to 0 before the erasure.
Since the nor device is erased with 64 ~ For blocks of KB, the time for performing a write/erase operation is 5 S. In contrast, the erased NAND device is 8 ~ For 32 KB blocks, it takes up to 4 ms to perform the same operation.
When the block size is erased, the performance gap between nor and nadn is further extended. Statistics show that for a given set of write operations (especially when updating small files ), more erasure operations must be performed in the nor-based unit. In this way, when selecting a storage solution, the designer must weigh the following factors.
● Nor reads faster than NAND.
● NAND writes much faster than nor.
● NAND's 4 Ms erasure speed is far faster than nor's 5s.
● Most write operations require erasure first.
● NAND has fewer erased units and fewer erased circuits.
Interface differences Nor Flash has an SRAM interface and enough address pins to address it, so it can easily access every byte in it.
Nand devices use complex I/O ports to access data in a serial manner. Different products or vendors may use different methods. Eight pins are used to transmit control, address, and data information.
Nand read and write operations use 512 bytes of blocks, which is a bit like hard disk management. Naturally, NAND-based memory can replace hard disks or other Block devices.
Capacity and cost The unit size of NAND Flash is almost half the size of the nor device. Because the production process is simpler, the NAND structure can provide a higher capacity within the given mold size, thus reducing the price accordingly.
Nor flash occupies 1 ~ Most of the 16 MB flash memory market, while NAND Flash is only used in 8 ~ Among the MB products, this also shows that nor is mainly used in code storage media. NAND is suitable for data storage. NAND shares the largest share in the compactflash, secure digital, PC cards, and MMC memory cards markets.
Reliability and Durability When Using Flash Media, reliability is a key issue to be considered. Flash is a suitable storage solution for systems that need to expand MTBF. The reliability of nor and NAND can be compared in terms of life (durability), bit switching and bad block processing.
In nand flash memory, the maximum number of writes to each block is 1 million, while that of nor is 100,000. In addition to having a block erasure cycle of 10 to 1, the typical NAND block size is eight times smaller than that of the nor device, each NAND memory block is deleted less frequently within a given period of time.
All flash devices are plagued by bit switching. In some cases (rarely, Nand occurs more often than nor), a bit is reversed or reported to be reversed.
One-bit changes may not be obvious, but if it occurs on a critical file, this small fault may cause system downtime. If there is only a report problem, it may be solved by reading multiple times.
Of course, if this bit changes, you must use error detection/error correction (EDC/ECC) Algorithm . The problem of bit inversion is more common in nand flash memory. The NAND supplier recommends using the EDC/ECC algorithm when using nand flash memory.
This problem is not fatal when using NAND to store multimedia information. Of course, if you use a local storage device to store operating systems, configuration files, or other sensitive information, you must use the EDC/ECC system to ensure reliability.
Bad Block Processing
Bad blocks in NAND devices are randomly distributed. I have tried to eliminate bad blocks before, but I found that the yield rate is too low, the cost is too high, and it is not cost-effective at all.
The NAND device needs to initialize the media to detect Bad blocks and mark them as unavailable. In an existing device, a high failure rate may occur if this processing is not performed in a reliable way.
Easy to use
The nor-based flash memory can be used very directly, and can be connected like other memory, and code can be directly run on it.
Due to the need for I/O interfaces, Nand is much more complicated. The access methods for various NAND devices vary from manufacturer to manufacturer.
When using the NAND device, you must first write the driver to continue other operations. Writing information to a NAND device requires considerable skill, because designers must not write information to Bad blocks, which means virtual ing must be performed from beginning to end on the NAND device.
When discussing software support, we should distinguish basic read/write/erase operations from high-level software for disk simulation and flash management algorithms, including performance optimization.
Running code on the nor device does not require any software support. When performing the same operation on the NAND device, the driver is usually needed, that is, the memory technology driver (MTD ), the NAND and nor devices require MTD for write and erase operations.
Fewer MTDS are required to use the nor device. Many vendors provide more advanced software for the nor device, including the trueffs driver of the M-system, this driver is used by Wind River system, Microsoft, QNX software system, Symbian, Intel, and other vendors.
The driver is also used to simulate diskonchip products and manage nand flash memory, including error correction, Bad Block Processing, and loss balancing.
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