Differences between push-pull output, open-drain output, reuse of Open-drain output, reuse of push-pull output, pull-down input, floating-empty input, and analog input

Recently, when reading the Data Manual, I found that there are eight types of gpio configuration in the Cortex-M3:

(1) Input simulation by gpio_mode_ain

(2) gpio_mode_in_floating floating empty Input

(3) gpio_mode_ipd drop-down type

(4) pulling input from gpio_mode_ipu

(5) gpio_mode_out_od output Leakage

(6) Push and pull output of gpio_mode_out_pp

(7) gpio_mode_af_od reuse of Open-drain output

(8) gpio_mode_af_pp reuse the push-pull output

For beginners, I think these concepts must be clarified. The most commonly used concepts are push-pull output, open-leak output, and pull-up input, however, I have never summarized these issues. Therefore, here is a summary:

Push-pull output: outputs high and low levels and connects to digital devices. A push-pull structure generally means that two transistors are controlled by two complementary signals, which always end when one transistor is turned on. The level is determined by the power supply of the IC.

The push-pull circuit is a three-circuit transistor or transistor with the same parameters. It exists in the circuit in the push-pull mode. It is responsible for waveform amplification tasks of plus or minus half weeks. When the circuit works, the two symmetric power switches have only one on-going switch each time, so the on-going loss is small and the efficiency is high. The output can either inject current to the load or extract current from the load. The push-pull output level not only improves the load capacity of the circuit, but also increases the switching speed.

Understanding:

The output level of the push-pull amplifier has two "arm" (two sets of amplification elements). When the current of one "arm" increases, the current of the other "arm" decreases, the two statuses are converted in turn. For the load, it seems that an arm is pushing and an arm is pulling to complete the current output task. When the output power is high, that is, when the lower-level load door is input high, the output current will be pulled from the lower-level power supply through vt3. In this way, vt3 and vt5 work in turn to reduce power consumption and improve the affordability of each pipe. Regardless of the path, the on-resistance of the pipe is very small, so that the RC constant is very small, and the transformation speed is very fast. Therefore, the push-pull output level not only improves the load capacity of the circuit, but also increases the switching speed.

Open-drain output: the output end is equivalent to the collector of the transistor. To obtain a high-level state, the output end must be able to pull up the resistor. It is suitable for current-type drive and has a strong ability to absorb the current (generally less than 20 mA ).

Open-drain circuit has the following features:

1. Use the drive capability of the external circuit to reduce the internal drive of the IC. When the internal MOS of the IC are turned on, the driving current is from the external VCC flowing through the R pull-up, the MOs to Gnd. The IC only needs a very low gate drive current.

2. in general, the open-drain pin is used to connect devices of different levels. It is used to match the level, because when the Open-drain pin is not connected to the external pull-up resistor, only the low level can be output, if you need to have the output high level function at the same time, you need to connect to the Pulling Resistance. A good advantage is that you can change the transmission level by changing the voltage of the pulling power source. For example, the TTL/CMOS level output can be provided by adding a pull-up resistor. (The resistance of the pull-up resistor determines the speed of the logical level conversion.
. The higher the resistance value, the lower the speed and the lower the power consumption. Therefore, the load resistance should take into account both power consumption and speed .)

3. Open-drain provides a flexible output mode, but it also has its weakness, that is, the delay of the rising edge. Because the rising edge is charged by the external pull passive resistance, the latency is small when the resistance is selected, but the power consumption is large; otherwise, the delay is large and the power consumption is small. Therefore, if you have requirements for latency, we recommend that you use the descent edge output.

4. You can connect multiple pin pairs with open/missing output to an online line. A logical relationship is formed by means of an up-pull resistor without adding any device. This is also the principle that I2C, SMBus, and other bus determine the bus occupation status. Supplement: What is "line and "? :

On a single node (line), connect an upstream resistor to the Collector C or drain D of the power supply VCC or VDD and N or NMOS transistors, the emission pole E or source Pole s of these transistors are connected to the ground line. As long as there is a transistor saturated, this node (line) is pulled to the ground wire. because the base pole of these transistors is injected with current () or the gate is added with a high level (NMOS), the transistor will be saturated, so these base poles or gate nodes (lines) or non-Nor Logic. if this node is followed by an inverter, It is the or logic.

In fact, it can be simply understood that when all the pins are connected together, the external one pulls the resistor. If one pin outputs the logic 0, it is equivalent to grounding, the parallel circuit "is equivalent to being short-circuited by a wire", so the logic level of the outer circuit is 0, and the result is logical 1 only when the power is high.

Finally, we use the simplest picture to summarize the push-pull output and open-drain output:

In this figure, the left side is the push-pull output mode, where the comparator outputs the high level and the PNP transistor ends, while the top is the switch-on mode, and the output level is Vs +. When the comparator outputs Low Power, the opposite is true, the PNP transistor is on, and the output is connected to the ground, which is low. The right side can be understood as the form of open or missing output, which needs to be connected and pulled.

Float input: For float input, no authoritative explanation has been found, so I have to understand it from the middle.

Since float input is generally used for external key input, combined with the input circuit in the figure, I understand that the I/O Level status is uncertain in the float input state, it is determined by the external input. If the PIN is left blank, the read level of the port is uncertain.

Pull up input/drop down input/simulate input: these concepts are easy to understand and can be easily understood from the literal.

Reusable open-drain output and reusable push-pull output: it can be understood as the configuration when the gpio port is used as the second function (that is, it is not used as a general IO port)

Summary:

Select Io mode in stm32

(1) float input _ in_floating -- float input, which can be used for key recognition, rx1

(2) with pull input _ IPU--IO internal pull resistance Input

(3) drop-down resistor input with drop-down input _ IPD -- I/O internal drop-down resistor Input

(4) analog input _ Ain-application ADC analog input, or power saving at Low Power Consumption

(5) Open-drain output _ out_od -- IO output 0 is connected to Gnd, Io output 1 is suspended, and the output level can be high only when the external pulling resistance is needed. When the output is 1, the status of the IO port is increased from the pull-up resistor. However, because the output mode is open or missing, the IO port can be changed from the external circuit to the low or unchanged. Allows you to read Io input level changes to implement the IO bidirectional function of C51.

(6) push-pull output _ out_pp -- IO output 0-connected to Gnd, Io output 1-connected to VCC, read input value is unknown

(7) push-pull output of multiplexing function _ af_pp-on-chip peripheral function (I2C SCL, SDA)

(8) Out-of-the-box output _ af_od of the multiplexing function-in-chip peripherals (tx1, Mosi, miso. sck. SS)

Stm32 setting instance:

(1) simulate I2C using the open-drain output _ out_od, connect to the pulling resistor, and correctly output 0 and 1; when reading the value, gpio_setbits (gpiob, gpio_pin_0); pull height, then you can read the IO value. Use gpio_readinputdatabit (gpiob, gpio_pin_0 );

(2) For the maximum pulling resistance, Io is a high level by default. to read the IO value, you can use the input _ IPU and the input _ in_floating and output _ out_od with an open or missing value;

Recently, when reading the Data Manual, I found that there are eight types of gpio configuration in the Cortex-M3:

(1) Input simulation by gpio_mode_ain

(2) gpio_mode_in_floating floating empty Input

(3) gpio_mode_ipd drop-down type

(4) pulling input from gpio_mode_ipu

(5) gpio_mode_out_od output Leakage

(6) Push and pull output of gpio_mode_out_pp

(7) gpio_mode_af_od reuse of Open-drain output

(8) gpio_mode_af_pp reuse the push-pull output

For beginners, I think these concepts must be clarified. The most commonly used concepts are push-pull output, open-leak output, and pull-up input, however, I have never summarized these issues. Therefore, here is a summary:

Push-pull output: outputs high and low levels and connects to digital devices. A push-pull structure generally means that two transistors are controlled by two complementary signals, which always end when one transistor is turned on. The level is determined by the power supply of the IC.

The push-pull circuit is a three-circuit transistor or transistor with the same parameters. It exists in the circuit in the push-pull mode. It is responsible for waveform amplification tasks of plus or minus half weeks. When the circuit works, the two symmetric power switches have only one on-going switch each time, so the on-going loss is small and the efficiency is high. The output can either inject current to the load or extract current from the load. The push-pull output level not only improves the load capacity of the circuit, but also increases the switching speed.

Understanding:

The output level of the push-pull amplifier has two "arm" (two sets of amplification elements). When the current of one "arm" increases, the current of the other "arm" decreases, the two statuses are converted in turn. For the load, it seems that an arm is pushing and an arm is pulling to complete the current output task. When the output power is high, that is, when the lower-level load door is input high, the output current will be pulled from the lower-level power supply through vt3. In this way, vt3 and vt5 work in turn to reduce power consumption and improve the affordability of each pipe. Regardless of the path, the on-resistance of the pipe is very small, so that the RC constant is very small, and the transformation speed is very fast. Therefore, the push-pull output level not only improves the load capacity of the circuit, but also increases the switching speed.

Open-drain output: the output end is equivalent to the collector of the transistor. To obtain a high-level state, the output end must be able to pull up the resistor. It is suitable for current-type drive and has a strong ability to absorb the current (generally less than 20 mA ).

Open-drain circuit has the following features:

1. Use the drive capability of the external circuit to reduce the internal drive of the IC. When the internal MOS of the IC are turned on, the driving current is from the external VCC flowing through the R pull-up, the MOs to Gnd. The IC only needs a very low gate drive current.

2. in general, the open-drain pin is used to connect devices of different levels. It is used to match the level, because when the Open-drain pin is not connected to the external pull-up resistor, only the low level can be output, if you need to have the output high level function at the same time, you need to connect to the Pulling Resistance. A good advantage is that you can change the transmission level by changing the voltage of the pulling power source. For example, the TTL/CMOS level output can be provided by adding a pull-up resistor. (The resistance of the pull-up resistor determines the speed of the logical level conversion.
. The higher the resistance value, the lower the speed and the lower the power consumption. Therefore, the load resistance should take into account both power consumption and speed .)

3. Open-drain provides a flexible output mode, but it also has its weakness, that is, the delay of the rising edge. Because the rising edge is charged by the external pull passive resistance, the latency is small when the resistance is selected, but the power consumption is large; otherwise, the delay is large and the power consumption is small. Therefore, if you have requirements for latency, we recommend that you use the descent edge output.

4. You can connect multiple pin pairs with open/missing output to an online line. A logical relationship is formed by means of an up-pull resistor without adding any device. This is also the principle that I2C, SMBus, and other bus determine the bus occupation status. Supplement: What is "line and "? :

On a single node (line), connect an upstream resistor to the Collector C or drain D of the power supply VCC or VDD and N or NMOS transistors, the emission pole E or source Pole s of these transistors are connected to the ground line. As long as there is a transistor saturated, this node (line) is pulled to the ground wire. because the base pole of these transistors is injected with current () or the gate is added with a high level (NMOS), the transistor will be saturated, so these base poles or gate nodes (lines) or non-Nor Logic. if this node is followed by an inverter, It is the or logic.

In fact, it can be simply understood that when all the pins are connected together, the external one pulls the resistor. If one pin outputs the logic 0, it is equivalent to grounding, the parallel circuit "is equivalent to being short-circuited by a wire", so the logic level of the outer circuit is 0, and the result is logical 1 only when the power is high.

Finally, we use the simplest picture to summarize the push-pull output and open-drain output:

In this figure, the left side is the push-pull output mode, where the comparator outputs the high level and the PNP transistor ends, while the top is the switch-on mode, and the output level is Vs +. When the comparator outputs Low Power, the opposite is true, the PNP transistor is on, and the output is connected to the ground, which is low. The right side can be understood as the form of open or missing output, which needs to be connected and pulled.

Float input: For float input, no authoritative explanation has been found, so I have to understand it from the middle.

Since float input is generally used for external key input, combined with the input circuit in the figure, I understand that the I/O Level status is uncertain in the float input state, it is determined by the external input. If the PIN is left blank, the read level of the port is uncertain.

Pull up input/drop down input/simulate input: these concepts are easy to understand and can be easily understood from the literal.

Reusable open-drain output and reusable push-pull output: it can be understood as the configuration when the gpio port is used as the second function (that is, it is not used as a general IO port)

Summary:

Select Io mode in stm32

(1) float input _ in_floating -- float input, which can be used for key recognition, rx1

(2) with pull input _ IPU--IO internal pull resistance Input

(3) drop-down resistor input with drop-down input _ IPD -- I/O internal drop-down resistor Input

(4) analog input _ Ain-application ADC analog input, or power saving at Low Power Consumption

(5) Open-drain output _ out_od -- IO output 0 is connected to Gnd, Io output 1 is suspended, and the output level can be high only when the external pulling resistance is needed. When the output is 1, the status of the IO port is increased from the pull-up resistor. However, because the output mode is open or missing, the IO port can be changed from the external circuit to the low or unchanged. Allows you to read Io input level changes to implement the IO bidirectional function of C51.

(6) push-pull output _ out_pp -- IO output 0-connected to Gnd, Io output 1-connected to VCC, read input value is unknown

(7) push-pull output of multiplexing function _ af_pp-on-chip peripheral function (I2C SCL, SDA)

(8) Out-of-the-box output _ af_od of the multiplexing function-in-chip peripherals (tx1, Mosi, miso. sck. SS)

Stm32 setting instance:

(1) simulate I2C using the open-drain output _ out_od, connect to the pulling resistor, and correctly output 0 and 1; when reading the value, gpio_setbits (gpiob, gpio_pin_0); pull height, then you can read the IO value. Use gpio_readinputdatabit (gpiob, gpio_pin_0 );

(2) For the maximum pulling resistance, Io is a high level by default. to read the IO value, you can use the input _ IPU and the input _ in_floating and output _ out_od with an open or missing value;