Explanation: PN532 use of NFC

First, Introduction

The PN532 is a highly integrated contactless read-write chip that contains the 80C51 microcontroller core, which integrates various active/passive contactless communication methods and protocols under 13.56MHz.

Operating mode:

Reader mode, support ISO/IEC 14443a/mifare? mechanism

Reader mode, support FeliCa mechanism

Reader mode, supports ISO/IEC 14443B mechanism

Card operation mode, support ISO 14443a/mifare? mechanism

Card operation mode, FeliCa mechanism

iso/iec18092,ecm340 Point-to-point

Characteristics

80C51 microcontroller core with both a 1 KB ROM and a DC RAM

Highly integrated analog circuitry, demodulation and decoding response

Output buffered drives connect antennas with minimal external passive devices

Integrated RF Field Detector

Integrated Data Mode Detector

Support ISO/IEC 14443a/mifare?

ISO/IEC 14443B is supported only in reader mode

Typical operating distance in reader mode is more than 50mm, the specific distance is determined by antenna size, tuning and power

Working distance up to 50mm in NFCIP-1 mode, depending on antenna size, tuning and power supply

Typical operating distance in the card operating mode is approximately 100mm, depending on the antenna size, tuning and external field strength

Supports MIFARE Classic encryption in reader-writer mode, supports 212 kbit/s and 424 kbit/s two higher data rates

Support for 106kbit/s, 212KBIT/S, and 424kbit/s communication baud rates in FeliCa mode

Integrated NFCIP-1 RF interface with transmission rates up to 424kbit/s

Support Host Interface:

-spi interface

-I2C interface

-Serial UART

Flexible interrupt Mode

Low power mode One hardware-power-down mode one software power-down mode

Automatic wake-up via I²c, Hsu and SPI interfaces when the device is in power-down mode

Programmable timers

Quartz Crystal Oscillator

2.7V~5.5V's power supply

Second, communication interface

There are three ways to communicate between the PN532 and the host: I²c, SPI, HSU, which almost satisfies all the master chips. Is the choice of means of communication

It is important to note that:

SPI can only select operating mode 0. That is, the SPI's idle level is high, the data is always sampled at the first edge of the sck, and the data is sent in a format that is always LSB ahead. As long as the NSS pin is low, the chip will be awakened.

Hsu High-speed serial port default configuration is: 8 data bits, 1 stop bit, LSB first sent, baud rate 115200, no calibration

In i²c mode, the default slave address is 0x48, the MSB is sent first, the maximum support rate is 400KHz

Third, packet format

The communication data between the PN532 and the host has a fixed format, so long as we send the data in the prescribed format, we can control the PN532 completely. This greatly improves the efficiency of our development

1. Normal data packet

00 Sequence Head

XX FF start number

Len packet length, including TFI

LCS data length checksum, LEN lcs=0

TFI command

PD0 PD1 ... PDn data

DCS data checksum TFI PD0 ... PDn = 0

00 Sequence endings

2. PN532 Reply Package

00 Sequence Head

XX FF start number

FF Reply Pack

00 End sequence

3, non-response package

00 Sequence Head

XX FF start number

FF 00 not answered

00 End sequence

4. Extended Data Packet

Under normal circumstances, only 256 bytes of data can be sent, and PN532 provides a special format for sending more data. Of course, when we use it, we have to choose according to the actual situation.

00 Sequence Head

XX FF start number

FF Normal mode package length, here is FF

FF Normal mode packet length checksum, here is FF

The length of the LENM packet is high byte,

LENL packet Length Low byte, contains TFI

LCS data length checksum, Lenm lenl lcs=0

TFI command

PD0 PD1 ... PDn data

DCS data checksum TFI PD0 ... PDn = 0

00 Sequence endings

Iv. Wake-Up PN532

Wake-up of the chip must meet the following 3 conditions

1) PVDD pin Pull High

2) i²c mode send address 48H,SPI mode will NSS pull low, serial port mode in fact the data header must be 0x55,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0xff,0x03,0xfd,0xd4,0x14,0x01,0x17,0x00

3) host must send command 14 02 00 (virtual mode) or 14 01 (normal mode)

V. Read and write S50 card process

1, wake-up module, host Send command

0X55,0X55,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00,0XFF,0X03,0XFD,0XD4,0X14,0X01, 0x17,0x00

Module response

0x00,0x00,0xff,0x02,0xfe,0xd5,0x15,0x16,0x00

In the process of waking up the module, the header of the data is somewhat special, which is found in the chip manual.

Note that for the sake of brevity, the following command contains only the Tfi\data in the packet format, and the other readers should add their own

2. Scan the card and get the card ID, the host sends

0XD4,0X4A (list cards), 0x02 (max. 2), 0x00 (baud rate)

Response

0XD5,0X4B,0X02 of two devices

0x01 (one device), 0x04,0x00,0x08,0x04 (length), Id1,id2,id3,id4,

0x02 (unit second), 0x04,0x00,0x00,0x04 (length), Id1,id2,id3,id4,

3, verify a key, the host sends

0xd4,0x40 (Exchange data), 0x01 (device 1th), 0x60 (Authentication a), 0x03 (address)

0xff,0xff,0xff,0xff,0xff,0xff (Keya), 0xc1,0x32,0x77,0x03 (ID)

Response

0xd5,0x41,0x00 (Success)

4, verify the B secret key, the host sends

0xd4,0x40 (Exchange data), 0x01 (device 1th), 0x61 (authentication b), 0x03 (address)

0xff,0xff,0xff,0xff,0xff,0xff (KeyB), 0xc1,0x32,0x77,0x03 (ID)

Response

0xd5,0x41,0x00 (Success)

5, read the card, the host sends

0xd4,0x40 (Exchange data), 0x01 (device 1th) 1,0x30 (read 16Bytes), 0x02 (address)

Response

0xd5,0x41,0x00 (Success), Byte1,btyte2 ...

6, write card, host send

0xd4,0x40 (Exchange data), 0x01 (1th device) 1,0xa0 (write 16Bytes), 0x02 (address), data1,data2 ...

Response

0xd5,0x41,0x00 (Success)

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Explanation: PN532 use of NFC