Recently I have been learning the use of ZYNQ Soc, the purpose is to respond to scientific research needs, to make a common algorithm verification platform. Presumably the idea is: ZYNQ PS End is responsible for and MATLAB and other PC data analysis and visualization software interaction: can transfer data, but also through the host Computer Configuration update hardware algorithm module configuration register content, while the calculation and analysis of the PL-terminal algorithm to achieve performance indicators. The FPGA logic at the PL end is responsible for the hardware implementation of the algorithm to explore the efficient parallel hardware architecture. To this end, I will continue to write the "Use ZYNQ SOC fast open algorithm verification pathway" series of special blog, at all stages of the basic summary.
Data in MATLAB is a double-precision floating-point type, so the first step to open the algorithm verification path is the conversion between the floating-point number and the fixed-point binary complement in MATLAB. In the previous blog post: "FPGA and MATLAB data Interactive high efficiency verification algorithm-simulation phase" mentioned in two kinds of numerical representations between the conversion, but in order to facilitate testbench simulation, MATLAB write and read files are txt text files. In the algorithm board-level validation, the data should be processed in a binary data mode that is not ASCII encoded. here are the differences between the MATLAB functions fscanf and fprintf, and the function fread and Fwrite, the first two are read and write text files, the latter two read and write binary files.
The following gives the floating point point conversion and the read-write binary file code:
First look at the data written to the file and whether the data read back from the file is consistent.
Direct contrast data and command detection results show that both are exactly the same. Now open the file with the Uedit software and display it in 16 binary mode:
We use the first two data for verification, followed by 00_38 and ff_2a. Because it is a complement form, it is first written in binary form: 0000_0000_0011_1000 and 1111_1111_0010_1010, then converted to the original code: 0000_0000_0011_1000 and 1000_0000_1101_ 0110, the decimal result is 56 and-240, and MATLAB data match.
Very simple things bothered me for a while, I hope to help you. Because the algorithm verification platform is only the carrier, the most important is the PL end of the algorithm hardware implementation part. In order to quickly form the algorithm verification path, the network debugging assistant and the W5500 protocol stack chip are used to realize the data transmission between MATLAB and ZYNQ, so as to avoid the workload of the PC Software and network protocol. This section is described in the next blog post.
Fast Open algorithm with ZYNQ SOC verification pathway (1)--matlab floating point and fixed-point binary complement