Feature structure of Intel 8086/8088 Microprocessor

1. 8086/8088 CPUInternal Structure

 

8086/8088 contains two main components: the bus interface component Biu is used to take commands, take operations, and store results; The Execution Component EU is used to execute commands. When executing the EU command, Biu completes the pre-fetching of the subsequent command from the main memory at the same time. The two parts work in parallel, which improves the instruction execution speed. :

 

 

(1) execution part EU

◆ Obtain the instruction code from the instruction queue. After decoding by the EU controller, the control signal is generated and each component is sent to complete the operation specified in the instruction;

◆ Perform arithmetic and logical operations and modify the mark register based on the results;

◆ When data needs to be transmitted with the primary storage or I/O port, a 16-bit valid address (EA) and data are provided for Biu.

 

(2) Bus Interface Component Biu

 

◆ Queue from the Master Access command to the command queue. (8086: 6 bytes; 8088: 4 bytes)

◆ Obtain the operands or operation results from the primary or I/O Ports.

◆ Calculate and form the physical address used to access the primary storage.

 

2. 8086/8088Primary storage address Formation

 

Primary storage capacity: 1 MB in bytes, which requires 20-bit address lines. The primary storage space is divided into several segments, each of which is ≤ 64 K Bytes. In the CPU, set the segment register to indicate the height of the 20-bit starting address of the segment.

 

Segment Base Address: the starting address of a segment. The minimum value of 4 characters must be 0.

 

Offset: The Byte distance between a storage unit and a segment base address.

 

Segment Base Value: The 16-bit high of the 20-bit segment base address, which is placed in the segment register.