First glimpse of the Windows Kernel (ii)-----system mechanism

System mechanism:

Windows2000 provides some basic mechanisms for the core mentality of actuators, cores, device drivers, and so on. Let's take a look at what's going on:

(1) Trap scheduling: Includes interrupts, deferred procedure calls (DPC), asynchronous procedure Call (APC), exception handling, system service scheduling.

(2) Executive Body Object Management

(3) Synchronization mechanism: Spin lock, kernel scheduling object and how to implement the wait

(4) System thread

(5) Various system mechanisms such as WINDOWS2000 global flag

(6) Local procedure Call

Let's analyze it one by one:

Trap scheduling:

The essence of interrupts and exceptions is that the CPU does not work in the normal steps, and both hardware and software are able to perceive them. A trap is a system mechanism that saves the current thread state and shifts to the appropriate processing when an exception or interrupt occurs. In Windows2000, the processor gives control to the trap handlers-some programs that specialize in handling interrupts and exceptions. Some examples of activation trap handlers are given:

Interrupt

Interrupt handling Process

Trap handlers

Requesting system Services

Interrupt handling Process

Hardware and Software exceptions

Exception Scheduler

Abnormal Processing

Virtual Address exception

Virtual Address Management

The kernel distinguishes interrupts and exceptions by: Interrupts are an asynchronous event (which can be generated at any time), regardless of the program the processor is executing. Interrupts are typically generated by I/O devices, clocks, timers, and we can block interrupts if necessary. The exception is a synchronous event that is generated by the specific code being executed, and re-executing the same code repeats the specific exception. such as access to illegal memory, the divisor is 0 and so on. The system also handles system services as exceptions.

Whether hardware or software can produce interrupts and anomalies, for example, a bus exception is caused by hardware, and the divisor of 0 is obviously caused by a bug in the software, as well, I/O devices can generate interrupts, the kernel itself can also produce soft interrupts (APC,DPC).

When a hardware outage or exception occurs, the processor collects sufficient state information to ensure that the exception or interrupt is processed correctly to return to the current execution point. The processor is implemented by creating a trap framework in the kernel stack area of the current thread, which is used to save the scene. The trap framework is typically part of the entire context of the thread. The soft interrupt is treated as part of a hard interrupt, or the corresponding handler in the kernel is called.

In most cases, when a trap occurs, the kernel is responsible for finding the appropriate handler and is responsible for resuming execution of the interrupted thread when the handler returns.

Interrupt Scheduling:

The hardware interrupt is generated by the I/O device in order to obtain the CPU service, and this interrupt mechanism makes the CPU utilization much higher. Software can also generate interrupts, for example, the kernel can initiate an interrupt for thread scheduling. The kernel can turn off interrupts when necessary, so that the CPU can block out any interrupts-----which are sometimes necessary, such as thread access to critical sections, exception handling, and so on.

Hardware Interrupt Handling:

In the X86 family, external interrupts are queued in the interrupt controller, and the controller interrupts the CPU in turn. When the CPU is interrupted, it requires the interrupt controller to submit the interrupt request, the interrupt controller translates the interrupt request to the interrupt request number, and the number as an index to query the interrupt schedule (IDT), and gives control to the corresponding interrupt handler. The Interrupt dispatch table (IDT) is initialized when the system is started, including the interrupt number and corresponding handler.

Interrupt Request Login Level IRQL:

Interrupts are hierarchical, which is applicable for both soft and hard interrupts. The kernel will break to 0---31 a total of 32 levels, high privilege. The kernel is responsible for matching the soft interrupt to the appropriate level, and the HAL is responsible for the hardware interrupt corresponding to the corresponding level. As shown in the following:

Interrupt processing is run on a level that is preemptive and high-level to block low-level operations. When the interrupt handler is run, the CPU sets its own IRQL to the IRQL of the interrupt to be performed, and then runs.

So how does the system map the hardware interrupts to the corresponding IRQL? The answer is HAL, in WINDOWS2000, the bus driver learns all the devices connected to the bus and what interrupts each device can make, and then the bus driver reports the resulting situation to the PNP (Plug and Play manager), making a choice. Finally, the HAL function halpgetsysteminterruptvector is called to implement the mapping.

First glimpse of the Windows Kernel (ii)-----system mechanism