First, the boot into real mode--BIOS->MBR (hard disk sector copy function)->loader

Description: Most of the records I have unfamiliar content, so the knowledge point is not so comprehensive. Real Mode

Real mode refers to the 8086CPU CPU working principle, memory segmentation mode, addressing mode, register size, instruction usage, etc. How the CPU works: Using L1,L2 these SRAM buffers to work ... Memory Segmentation mode: Real-mode address is the actual physical address, address line 20, memory 1M, so "segment base: Segment offset Address" = Move the segment base to the left one plus the offset address to the actual physical address register size: Real mode is 16-bit wide, 2 16 times 64K, 8086 is the 20 address line, the memory size of 2 of 20 times 1M,CPU CS and IP are 16 bits, can only represent access to memory 64k, so access to memory form is   segment base address: Paragraph in the offset of the addresses   to access memory. The 1M size can be accessed by multiplying the segment base address by 16, the left 4 digits, and the offset in the segment to access the memory. Addressing methods: Register addressing, immediate number addressing, direct addressing, base address addressing, variable address addressing, base address change addressing, and so on. ds:bx  ss:bp  ds:si/di directive usage: IP cannot directly assign value      call   ret   jmp   flags   Jnz:zf is not equal to 0 time transfer, that is, the previous instruction CMP ax,cx AX-CX, when the ZF is not equal to 0, then jmp to the following instruction jc:cf=1 time transfer, that is, the previous instruction operation has carry, Then the jmp to the back of the instruction Jge:sf=of time transfer, that is, the previous instruction: CMP ax,cx, when the ax is greater than or equal to CX, JMP to the following instruction SHL ax,1: represents AX times 2 of the 1-time side XOR Ax,ax, which means emptying ax and: You can clear the value of 0 registers, you can also keep the original value of registers, so the most commonly used is the 32-bit register high 16-bit clear zero, low 16-bit retain the original value or:, you can set 1 storage, you can also reserve the original value of the register. can be used as addition, the most common is a register of high 16 bits and another register of the lower 16-bit addition of the general Mul SHL and or  These four instructions combined with: after multiplication, the high 16-bit low 16 bit is not in a register, so to move to a 32-bit register, first shift, In the clear zero, and then add the loop: Loop and CMP can be used to form loops, the loop is CX and 0 compared to each execution of the loop body after the cx-1, and then to perform the next cycle to determine the size of CX and 0 (cyclic conditions), if more than 0 to perform the next cycle, if 0 is to terminate the loop, and executes to the following code.    CMP is equivalent to subtraction, but does not change the size of the operand, only affects the flag bit (cyclic conditions), you can use the ZF to judge the time is equal, using CF to determine whether there is a carry to set the cyclic conditions. So loop and CX are equivalent for, and CMP is equivalent to do. While on Pentium and subsequent processors, the cyclic efficiency of the comparison + conditional transfer is usually higher than that of the loop, and the loop instruction has the limit of 8-bit offset of the transfer distance. However, in the case of a very high number of cycles, the loop instruction is more efficient because the branch prediction success rate for the loop instruction is 100% (the value of the cx/ecx before the loop instruction executes is known). So we try to use CMP to set loops

the real mode of memory layout below real mode is to be compatible with 8086, so only 20 address lines are supported and 20 =1mb:0x00000--0xfffff of 2. The following figure is 1M of memory layout: 0--0X9FFFF is dram, the size of 640KB, that is, we go to the motherboard plug the memory, the characteristics of the leakage point fast, need to refresh. 0XF0000-0XFFFFF is the motherboard memory rom, size 64KB, which is stored in the BIOS code. 0XA0000-C7FFFF is the area of the video card, including the ROM and memory of the video card. 0XC8000-0XEFFFF is a hardware adapter ROM or memory-mapped IO, each peripheral has its own memory, including the keyboard (8048, 8042), a variety of controllers (hard disk controller, interrupt Controller) and so on have their own memory. MBR (hard disk sector copy function)->loader "> MBR (hard disk sector copy function)->loader" > bios--base Input & Output system (basic input and output systems)

When you press the BIOS's power button, it enters real mode, and the first program that runs first is the BIOS. The function of BIOS code: detect, Initialize hardware, set up interrupt vector table, load MBR, etc. The BIOS is written into the ROM, 0xf0000-0xfffff. On the boot, the CPU's CS:IP is initialized to 0XF000:0XFFF0, segment base is multiplied by 16 that is left 4 bit, get 0xffff0, this address is the BIOS entrance address, this address is only 16B from the 1M top, so need to jump again, in 0xFFFF Place has the code JMP Far f000:e05b, jump to 0xfe05b address. Then start to detect memory, video card and other peripheral information, and then initialize the hardware, starting at the 0X000-0X3FF to establish the interrupt vector table, and fill out the interrupt vector information, and then load the MBR. The length is 1024B and can hold 256 interrupt vectors.

How the BIOS detects and initializes hardware: just mentioned above, the video card, keyboard, hard disk and other peripherals or its controller (IO interface) has its own processor, memory (ROM and RAM) and registers, these peripherals in the factory memory ROM is written to the self-detection program, initialization program, hardware operation Access Program , the BIOS can find the address of these programs directly to call. The Interrupt service program for the interrupt vector table set up in the BIOS is also written to ROM when these hardware is manufactured. The main features of these interrupts provide a means of accessing the hardware, essentially giving the IO port of these hardware a value, and using the int+ interrupt number to provide parameters in the CPU registers, Then the interrupt program inside the hardware ROM returns a result. such as graphics card, to display on the screen, int 0x10, it began in the interrupt vector table to find the corresponding program in the memory of the entry address, provided the parameters, CPU execution can be.

The last job of the BIOS is to verify the contents of the 0 1 sectors of the Startup disk (001), and when it is discovered that the last two bytes of this sector (512B) are 0x55 and 0XAA, the BIOS determines that this is the master boot mbr. Starts the Biso loader to load the contents of 001 sectors into the memory 0x07c00, and then executes the jump instruction: jmp 0:0x7c00,cs from 0xf000 into 0x0000. (0xaa55) Mbr--main boot record (primary bootstrapper) when the BIOS loads the MBR into the memory address as 0:0X7C00, the CPU begins to run at this address. The MBR is located in 001 sectors of the hard disk. The code inside the MBR includes 446-byte bootstrapper, 64-byte hard disk partition table, 2-byte end tag 0x55 and 0XAA. The MBR then loads the OBR (operating system loader) into memory and jumps to OBR code execution, OBR loading the operating system's code into memory. The MBR works under real mode. We write the MBR simple, not including so many things.
IO interface--cpu to communicate with peripherals

CPU only and IO interface for data exchange, never contact with peripherals, IO interface is CPU and external device logic control components, play a role in the bridge. The video card is the IO interface of the monitor and CPU, the sound card is the IO interface of stereo and CPU, the keyboard mouse hard disk has IO interface. Io interface functions are: 1, set data buffering, to solve the CPU and peripherals of the familiar mismatch problem. CPU processing data quickly, but the peripheral is very slow, you can first save the data to the IO interface buffer, and so on when needed to transmit the past. 2, set the signal level conversion. CPU signal is TTL, peripherals generally for motor equipment, need to convert signal. 3, the data format conversion, the digital signal after D/a conversion to analog signals sent to peripherals. etc. function.

The CPU accesses the IO interface via the bus. At the same time, the CPU can only communicate with an IO interface. There are a lot of requests at the same time CPU to consider the need to access which IO interface, so the quorum module--I/O control hub (input and output Controller center-South bridge). The IO interface has a set of ports (registers) that the CPU controls to access the hardware by manipulating those ports. Some ports are independently compiled, starting with 0, the port number of the same IO interface is continuous. The CPU communicates through the in/out instruction and the port number in the IO interface.

MBR (hard disk sector copy function)->loader >. The operation method of the port in IO interface: In instruction, the port number can only use the DX registers out instruction, may select the DX register or the immediate number serves as the port number. Ax is used to store 16 bits of data, and Al stores 8 as data.display and CPU IO interface--GraphicsWhen we let the screen show things in real mode, there are two methods: 1, through the BIOS interrupt, int 0x10 to call the video memory at the factory memory ROM to write the operating procedures to display information 2, you can write the video memory dram in the content. Video card is a PCI device, PCI bus is parallel, but there are defects, now the video card is serial, generally connected to the PCIe bus above, a transmission, when the data will be grouped together.     (The serial frequency is very fast, the video card, hard disk are serial). The CPU of the video card is called the GPU, the memory of the video card is called RAM, the work of the graphics card is to read this memory continuously, then send the content to the monitor. ASCII code is divided into two categories, one is not visible characters, 0x0-0x1f, 0x7F, a total of 33 control characters: BACKSPACE, carriage return, newline, delete, and so on, two categories are visible characters, 0x20-0x7e, a total of 95 visible characters: numbers, letters, punctuation. 0 ASCII code is the 48,a ASCII code is 97.
MBR (hard disk sector copy function)->loader "> We only use the 0xb8000-0xbffff text mode, the video card power, the default mode is 80*25, representing a line of 80 characters, a total of 25 lines, 2000 characters. Each character is represented on the screen by 2 bytes, the low byte is the ASCII code of the character, and the high byte is the character attribute meta information. Such a screen actually takes up 4000 bytes. MBR (hard disk sector copy function)->loader "> MBR (hard disk sector copy function)->loader" >

the IO interface between hard disk and CPU--hard disk controller     the video card is separate from the monitor, but the hard disk controller and the hard drive are usually connected together. There are generally two kinds of hard disk controllers: PATA interface-Parallel Ata,sata interface-parallel ATA. We discuss the old Pata,pata interface of the cable generally also becomes the IDE line, an IDE line can generally hang two hard drives, one master disk, one from the disk. A motherboard supports 4 IDE (PATA) hard disks, so motherboards typically have two IDE slots, called IDE0 (primary channel) and IDE1 (secondary channel), where one motherboard has two channels, each with a master disk and a disk. The     port is located on the IO interface, not on the hard drive. MBR (hard disk sector copy function)->loader > Notice that the port is given by channel and is for the hard disk controller rather than the hard disk. Two channels above the port corresponding to the same function, but the port number is different, such as 0x1f0 and 0x170 function, just located in different channels. Both the master and slave of the same channel use these ports, such as the master and slave drives of the primary channel can use 0x1f0 this port. Some ports have different uses for reading and writing. Data register: 16 bits. Read the hard disk, the hard drive after the data, the hard disk controller put it in the internal buffer, read this register can read out the buffer all the data. When writing a hard disk, the CPU will quickly transfer the data to this port, put in the hard disk controller's buffer, the hard disk can slowly read the data into the corresponding sector. (Hard disk controller has memory as buffer, generally 16-64m) error and feature register: 8 bits, refers to the same register, only in different environments have different uses. Sector count Register: 8 bits are used to set the number of sectors with read or to be written. Sector numbers have both CHS (Cylinder-head-sector) and LBA (Logical block address). We use the LBA number. LBA has LBA28 and LBA48 two species. The following number is the address of a sector that describes so many bits. 28 bits is 128GB, and we are taking the LBA28. Lbalow, Lbamid, Lbahigh:8 bit, a total of 8*3=24, the remaining 4 bits in the device register. Device Register: 8 bits, 4th to describe whether the hard drive is a master or a disk, and 0 is the master disk. MBR (hard disk sector copy function)->loader "> Status register: 8 bits. In the read hard disk, used to give the hard disk status information. In the write hard disk, register name is comMand, we generally use three commands: Identify:0xec, that is, hard disk recognition. Read sector:0x20, which is the reading sector. Write sector:0x30, which is the writing sector. Once the command register is written, the hard drive begins to work: After reading the sector command, the hard drive starts to load data from the sector to the hard drive buffer, and the CPU begins to load the data into the hard disk buffer after the name of the write sector. Then after reading the status register, the hard disk buffer is ready, the CPU can read data from the buffer or the hard drive can write data to the sector from the buffer. MBR (hard disk sector copy function)->loader >
Summarize the process of reading data from hard disk: 1, first select the channel (depending on the register name can know different channel), to the channel sector count register to write the number of sectors with operations. 2, to the three LBA registers, write the lower 24 bits of the sector start address. 3, write an LBA 24-27-bit to the device register and place the 6th bit 1 to LBA mode and set 4th to select whether the hard drive to operate is master or slave. 4, the hard drive begins to pass data to the buffer after writing to the command register on the channel to read the sector operation commands. 5, read the status register of the channel to determine whether the hard drive to the buffer to pass data work is completed. 6, start reading data from the hard disk buffer to memory if the hard drive is ready in the status register. If you are not ready, continue to detect the status register. The MBR is placed in the No. 0 sector (LBA) of the hard disk, and we place the loader in the 2nd sector. We select the loader loading address as 0x900.
Our MBR program features: Load the 2nd sector on the hard drive into the 0x900 of the memory address

 main boot program;------------------------------------------------------------%include "Boot.inc" 
   Section MBR vstart=0x7c00 mov ax,cs mov ds,ax mov es,ax mov ss,ax mov fs,ax mov mov ax,0xb800 mov gs,ax; Output string: MBR mov byte [gs:0x00], ' M ' mov byte [gs:0x01],0xa4 mov eax,loader_start_sector; Start Sector LBA address: 0x2 mov bx,loader_base_addr; Address to write: 0x900 mov cx,1; Number of sectors to be read: 1 sectors call rd_disk_m_16; The starting part of the following reader (a sector) jmp loader_base_addr, and jumps to the 0x900 to execute the program 

; function: Read hard disk n sectors, define this as a global variable Rd_disk_m_16:mov esi,eax, backup eax, and extended addressing in 16-bit real mode, machine code plus reverse instruction 0x67 mov di,cx; CX; read-write hard disk:; 1th step: Set Number of sectors to read MOV DX,0X1F2 mov al,cl out dx,al; number of sectors to read MOV Eax,esi; x; 2nd step: The LBA address is deposited in 0x1f3 ~ 0X1F6; LBA address 7~0 bit write port 0X1F3 mov dx,0x1f3 out dx,al; LBA address 15~8 bit write port 0X1F4 mov cl,8 shr eax,cl mov dx,0x1f4 out dx,al; LBA address 23~16 bit write port 0x1f5 shr EAX,CL mov dx,0x1f5 out dx,al shr eax,cl and al,0x0f; LBA 24th to 27th Bit or al,0xe0;                        
      Set the 7~4 bit to 1110 to indicate the LBA mode mov dx,0x1f6 out dx,al; Step 3rd: Write read command to 0X1F7 port, 0x20 mov DX,0X1F7 mov                  Out Dx,al Step 4th: Detect hard disk status. Not_ready:; At the same port, write to the command word, read to read the hard drive state NOP Null operation, equivalent to a sleep the in AL,DX and al,0x88; the 4th digit 1 indicates that the hard disk controller is ready for data transfer, and the 7th bit 1 indicates that the hard drive is busy CMP al,0x08 jnz. Not_reaDy Al and 0x08 are not equal, it means not ready, continue to wait. 5th step: Read data from 0x1f0 Port mov ax, di mov dx, 256 mul DX mov cx, ax; Di for the number of sectors to read, one sector has 512 bytes, each read a word,; A total of DI*512/2 times, so di*256 CX is the number of cycles, each cycle will be reduced to a MOV dx, 0x1f0. Go_on_read:; Read again and again in AX,DX mov [Bx],ax a DD bx,2 loop. Go_on_read ret times 510-($-$$) DB 0 db 0x55,0xaa

Boot.inc Program:

;-------------	 LOADER and kernel   ----------
loader_base_addr equ 0x900 
loader_start_sector equ 0x2

Loader program: Write virtual hard drive by DD command

%include "boot.inc" section
loader vstart=loader_base_addr, the		role is: At the time of the address of the label added to the address of the start up, not to say that the program loaded to this address

; The output background color green, foreground color red, and the beating string "1 MBR"
mov byte [gs:0x00], ' L '
mov byte [gs:0x01],0xa4     ; A indicates a green background flicker, 4 indicates the foreground color is red

jmp $		       ; a dead loop causes the program to hover over this

Summary: After the boot into real mode: First run Bios,bios the last job is to load the 001-sector (CHS) MBR into the memory 0x7c00, and the program in the MBR will loader from the hard disk to the memory (we set it to 0x900) to start running.