8080 compilation instructions

8080 Assembly manual data transmission instructions
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They transmit data between the storage and registers, registers, and input/output ports.
1. General data transmission commands.
MoV transfers words or bytes.
Movsx first extends the symbol and then transmits it.
Movzx is zero-scale and then transmitted.
Push pushes words into the stack.
Pop pops up the word stack.
Pusha pushes ax, CX, dx, BX, SP, BP, Si, di into the stack in sequence.
Popa pops up the Di, Si, BP, SP, BX, dx, CX, and ax stacks in sequence.
Pushad pushes eax, ECx, EDX, EBX, ESP, EBP, ESI, and EDI to the stack in sequence.
Popad pops up the stacks of EDI, ESI, EBP, ESP, EBX, EDX, ECx, and eax in sequence.
Bswap swap the byte order in 32-bit registers
Xchg exchanges words or bytes. (At least one operand is a register, and the segment register cannot be an operand)
Cmpxchg compares and exchanges operands. (The second operand must be the accumulators Al/ax/eax)
Xadd switches and then accumulates. (The result is in the first operand)
Xlat bytes table conversion.
── BX points to the starting point of a 256-byte table, and Al is the index value of the table (0-255, that is
0-FFH); returns the result of the Al table. ([Bx + Al]-> Al)
2. Input and Output port transfer command.
In I/O port input. (Syntax: In accumulators, {port number │ DX })
Out I/O port output. (Syntax: out {port number │ DX}, accumulators)
The input and output ports are scheduled in the immediate mode, and the range is 0-255. The input and output ports are scheduled in the DX mode,
The value range is 0-65535.
3. Destination Address Transfer command.
Load Lea to a valid address.
Example: Lea dx, string; Save the offset address to DX.
LDS transfers the target pointer and loads the pointer content into Ds.
For example: lDs Si, string; Save the segment address: Offset address to DS: Si.
Les transfers the target pointer and loads the pointer content into es.
For example, les Di and string; Save the segment address: Offset address to ES: Di.
LFS transfers the target pointer and loads the pointer content into FS.
For example: LFS Di, string; Save the segment address: Offset address to FS: Di.
LGS transfers the target pointer and loads the pointer content into Gs.
For example: LGS Di, string; Save the segment address: Offset address to GS: Di.
The LSS transfers the target pointer and loads the pointer content to the SS.
For example: LSS Di, string; Save the segment address: Offset address to SS: Di.
4. Flag transfer command.
The lahf flag register is transferred to load the flag into ah.
Send the sahf flag register and load the ah content into the flag register.
Pushf marks the inbound stack.
Popf indicates the exit of the stack.
Pushd 32-bit flag into the stack.
Popd 32-bit marks the stack.
Ii. arithmetic operation commands
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Add addition.
Addition of ADC incoming bits.
INC plus 1.
ASCII code adjustment for AAA addition.
Decimal adjustment of DAA addition.
Sub subtraction.
SBB subtraction with digits.
Dec minus 1.
NEC reverse (minus 0 ).
CMP comparison. (The two operands are used for subtraction. Only the flag bit is modified and the result is not returned ).
ASCII code adjustment for AAS subtraction.
Decimal adjustment of the DAS subtraction.
Mul unsigned multiplication.
Imul integer multiplication.
The above two results are returned to Ah and Al (byte operation), or Dx and ax (word operation ),
Adjust the ASCII code of AAM multiplication.
Div unsigned division.
Idiv integer division.
The above two items are returned:
Commercial Al delivery, remainder ah, (byte operation );
Or commodity delivery ax, remainder delivery dx, (word operation ).
The ASCII code of AAD division is adjusted.
CBW bytes are converted to words. (Extend the byte symbol in Al to Ah)
The CWD word is converted to a dual word. (Extend the characters in ax to dx)
The cwde character is converted to a dual character. (Extend the word symbol in ax to eax)
CDQ dual-word extension. (Extend the characters in eax to EDX)
Iii. Logic Operation commands
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And and operation.
Or.
XOR exclusive or operation.
Not.
Test. (Two operands are used for operations. Only the flag bit is modified and the result is not returned ).
SHL logic shifts left.
Sal arithmetic shifts left. (= SHL)
The SHR logic is shifted to the right.
SAR arithmetic shifts right. (= SHR)
Rol cycle shifts left.
Ror loop shifts right.
RCL shifts left through a carry loop.
RCR shifts right through a carry loop.
For the preceding eight shift commands, the number of shifts can reach 255.
The operation code can be used directly when one shift occurs. For example, SHL ax, 1.
If the value is greater than 1 shift, the CL registers the number of shifts.
For example, mov Cl, 04
SHL ax, Cl
Iv. String commands
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DS: Si source string segment register: Source string address change.
ES: di target string segment register: the address of the target string.
CX repeat count counter.
Scan value of Al/ax.
D sign 0 indicates that the Si and Di in the repeated operation should be automatically incremental; 1 indicates that the Si and Di should be automatically reduced.
The Z mark is used to control the end of a scan or compare operation.
Movs string transmission.
(Movsb transfer character. Movsw transfers words. Movsd transfers two characters. )
CMPS string comparison.
(Cmpsb comparison character. Cmpsw comparison. )
SCAs string scan.
Compare the content of Al or ax with the target string, and the comparison result is reflected in the flag.
Lods Mount string.
Add the elements (words or bytes) in the source string to Al or ax one by one.
(Lodsb transfer character. Lodsw transfer word. Lodsd transfers two-character data. )
STOs save string.
Is the lods inverse process.
Rep is repeated when CX/ECx <> 0.
Repe/repz is repeated when ZF = 1 or the comparison result is equal and CX/ECx <> 0.
Repne/repnz is repeated when ZF = 0 or comparison results are not equal and CX/ECx <> 0.
Repc repeats when cf = 1 and CX/ECx <> 0.
Repnc repeats when cf = 0 and CX/ECx <> 0.
V. Program transfer instructions
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1> unconditional transfer instruction (long transfer)
JMP unconditional transfer instruction
Call process call
RET/retf process returns.
2> conditional transfer instruction (short transfer,-128 to + 127)
(If and only when (sf xor of) = 1, OP1 Ja/jnbe is not less than or not equal to transfer.
Jae/JNB is greater than or equal to transfer.
JB/jnae is smaller than transfer.
Jbe/JNA is less than or equal to transfer.
Test the result of the unsigned integer operation (marked as C and Z ).
JG/jnle is greater than transfer.
Jge/JNL is greater than or equal to transfer.
Jl/jnge is smaller than transfer.
Jle/jng is less than or equal to transfer.
Test the result of the signed integer operation (S, O, and Z ).
Je/JZ is equal to transfer.
When JNE/jnz is not equal to, it is transferred.
When JC has an incoming position, it is transferred.
When JNC is not carried.
Transfer when jno does not overflow.
Transfer when the parity of jnp/JPO is an odd number.
Transfer when the JNS symbol bit is "0.
Jo overflow transfer.
If the parity of jp/jpe is an even number, it is transferred.
Transfer when the JS symbol bit is "1.
3> cyclic control commands (short transfer)
Loop CX is a non-zero loop.
Loope/loopz CX is not zero and the Mark Z = 1 is a loop.
Loopne/loopnz CX is not zero and the mark is Z = 0.
Jcxz CX is transferred at zero time.
When jecxz ECx is set to zero, it is transferred.
4> interrupt command
Int interrupt command
Into overflow interrupt
Iret interrupt return
5> processor control commands
The HLT processor is paused until an interruption or reset signal occurs.
When the chip lead test is high, the CPU enters the waiting state.
ESC to external processor.
Lock to block the bus.
NOP null operation.
STC sets the carry flag.
CLC flags.
The CMC carry mark is reversed.
STD indicates the position in the direction.
CLD flags in the clear direction.
STI sets the allowable interrupt bit.
CLI clear the allowed bits for interrupt.
Vi. pseudoinstructions
── ─
DW definition (2 bytes ).
Proc defines the process.
The endp process ends.
Segment.
Assume creates block register addressing.
The ends segment ends.
End program ends.

I. Mechanical Code, also known as machine code.
Open ultraedit. When editing the EXE file, you will see
A large number of digital devices, composed of 0, 1, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F.
Is the machine code.
When modifying a program, you must modify the machine code to modify the EXE file.

2. All Assembly knowledge that needs to be mastered (only so much)
It is not easy to understand. You can stick your back first and get familiar with your face. Then you will understand it slowly.
Cmp a, B compare A and B
MoV A and B send the value of B to
RET returns the main program
NOP is ineffective. The abbreviation of "no operation" means "do nothing" (machine code 90) *** for the meaning of the machine code, see the above
(Explanation: When ultraedit opens and edits the EXE file, you will see 90, equivalent to the compilation statement NOP)
Call subroutine
Je or JZ jump if they are equal (machine code 74 or 0f84)
Skip JNE or jnz if not equal (machine code 75 or 0f85)
JMP unconditional jump (machine code EB)
Skip if JB is smaller
Skip if ja is greater
Skip if JG is greater
Skip if jge is greater than or equal
Jl skip if it is smaller
Skip if jle is less than or equal
Pop output Stack
Push pressure Stack

3. Common changes (machine code)
74 => 75 74 => 90 74 => EB
75 => 74 75 => 90 75 => EB

Jnz-> NOP
75-> 90 (corresponding machine code modification)

Jnz-> JMP
75-> EB (corresponding machine code modification)

Jnz-> JZ
75-> 74 (normal) 0f 85-> 0f 84 (in special cases, sometimes the corresponding machine code is modified)

4. Different modification methods for different situations
1. Change to JMP
Je (JNE, JZ, jnz) => the corresponding JMP machine code EB (the first jump found in the error message) JMP is used to perform absolute and unconditional jumps, this skips the following error message.

Xxxxxxxxxxxx error message, such as: incorrect registration code, sorry, unregistered version cannot ..., "function not avaible In Demo" or "command not avaible" or "can't save in ware/demo" (we want to skip it to prevent it from appearing)
...
...
Xxxxxxxxxxxx the correct route

2. Change to NOP.
Je (JNE, JZ, jnz) => NOP corresponding machine code 90 (the first jump found in the correct information) NOP is used to erase the jump and make the jump invalid, lost, so that the program smoothly comes to the correct information behind it

Xxxxxxxxxxxx correct information, such as: Registration successful, thank you for your support, etc (we hope it will not be skipped, let it appear, the program must come here smoothly)
...
...
Xxxxxxxxxxxx error messages (we do not want to jump here to prevent it from appearing) are transmitted between the memory and registers, registers and the input and output ports.
1. General Data Transmission commands.
MoV transfers words or bytes.
Movsx first extends the symbol and then transmits it.
Movzx is not extended before transmission.
Push pushes words into the stack.
Pop pops up the word stack.
Pusha pushes ax, CX, dx, BX, SP, BP, Si, di into the stack in sequence.
Popa pops up the stack of DI, Si, BP, SP, BX, dx, CX, and ax in sequence.
Pushad pushes eax, ECx, EDX, EBX, ESP, EBP, ESI, and EDI to the stack in sequence.
Popad pops up the stacks of EDI, ESI, EBP, ESP, EBX, EDX, ECx, and eax in sequence.
Bswap swap the byte order in 32-bit registers
Xchg exchange word or byte. (at least one operand is a register, segment register cannot be used as the operand)
Cmpxchg compares and exchanges operands. (The second operand must be the accumulators Al/ax/eax)
Xadd switches and then accumulates (the result is in the first operand)
Xlat byte lookup conversion.
── BX points to the starting point of a 256-byte table, and Al is the index value of the table (0-255, that is
([Bx + Al]-> Al)
2. input and output port transfer command.
In I/O port input. (Syntax: In accumulators, {port number │ DX })
Out I/O port output. (Syntax: out {port number │ DX}, accumulators)
The input and output ports are scheduled in the immediate mode, and the range is 0-255. The input and output ports are scheduled in the DX mode,
The value range is 0-65535.
3. Destination Address Transfer command.
Load Lea to a valid address.
Example: Lea dx, string; Save the offset address to DX.
LDS transfers the target pointer and loads the pointer content into Ds.
For example: lDs Si, string; Save the segment address: Offset address to DS: Si.
Les transfers the target pointer and loads the pointer content into es.
For example, les Di and string; Save the segment address: Offset address to ESI.
LFS transfers the target pointer and loads the pointer content into FS.
For example: LFS Di, string; Save the segment address: Offset address to FSI.
LGS transfers the target pointer and loads the pointer content into Gs.
For example: LGS Di, string; Save the segment address: Offset address to GSI.
The LSS transfers the target pointer and loads the pointer content to the SS.
For example: LSS Di, string; Save the segment address: Offset address to ssi.
4. Mark transfer command.
Transmit the lahf flag register and load the flag into ah.
Send the sahf flag register and load the ah content into the flag register.
Pushf marks the inbound stack.
Popf marks the exit of the stack.
Pushd 32-bit flag into the stack.
Popd 32-bit marks the stack.

Ii. arithmetic operation commands
── ─
Add addition.
Addition of ADC incoming bits.
INC plus 1.
ASCII code adjustment for AAA addition.
Decimal adjustment of DAA addition.
Sub subtraction.
SBB with borrow subtraction.
Dec minus 1.
NEC reverse (minus 0 ).
CMP comparison. (two operands are used as subtraction. Only the flag bit is modified and the result is not returned ).
ASCII code adjustment for AAS subtraction.
Decimal adjustment of the DAS subtraction.
Mul unsigned multiplication.
Imul integer multiplication.
The above two results are returned to Ah and Al (byte operation), or Dx and ax (word operation ),
AAM multiplication ASCII code adjustment.
Div unsigned division.
Idiv integer division.
The above two items are returned:
Commercial Al delivery, remainder ah, (byte operation );
Or commodity delivery ax, remainder delivery dx, (word operation ).
ASCII code adjustment for aad division.
CBW byte conversion into words (extend the byte symbols in Al to Ah)
The CWD character is converted to a dual character. (extend the character symbol in ax to DX)
Convert the cwde character to a dual character. (extend the word symbol in ax to eax)
CDQ dual-word extension. (extend the characters in eax to EDX)

Iii. Logic Operation commands
── ─
And and operation.
Or operation.
XOR exclusive or operation.
Not inverse.
Test. (two operands are used for operation. Only the flag bit is modified and the result is not returned ).
SHL logic shifts left.
Sal arithmetic shifts left. (= SHL)
The SHR logic is shifted to the right.
SAR arithmetic shift right (= SHR)
Rol loop shifts left.
Ror loop shifts right.
RCL shifts left through carry loop.
RCR shifts right through carry loop.
In the preceding eight shift commands, the number of shifts can reach 255.
During one shift, you can directly use the operation code, such as SHL ax, 1.
If one shift is performed, the CL registers the number of shifts.
For example, mov Cl, 04
SHL ax, Cl

Iv. String commands
── ─
DS: Si source string segment register: Source string address change.
ESI target string segment register: the address of the target string.
CX repeat count counter.
Al/ax scan value.
D sign 0 indicates that the Si and Di in the repeated operation should be automatically incremental; 1 indicates that the Si and Di should be automatically reduced.
The Z mark is used to control the end of a scan or comparison operation.
Movs string transmission.
(Movsb transfer character. movsw transfer word. movsd transfer dual word .)
CMPS string comparison.
(Cmpsb comparison character. cmpsw comparison word .)
SCAs string scan.
Compare the content of Al or ax with the target string, and the comparison result is reflected in the flag.
Lods Mount string.
Add the elements (words or bytes) in the source string to Al or ax one by one.
(Lodsb transfer character. lodsw transfer character. lodsd transfer dual character .)
STOs save string.
Is the lods inverse process.
Rep is repeated when CX/ECx <> 0.
Repe/repz is repeated when ZF = 1 or the comparison result is equal and CX/ECx <> 0.
Repne/repnz is repeated when ZF = 0 or the comparison results are not equal and CX/ECx <> 0.
Repc repeats when cf = 1 and CX/ECx <> 0.
Repnc repeats when cf = 0 and CX/ECx <> 0.

V. Program transfer instructions
── ─
1> unconditional transfer instruction (long transfer)
JMP unconditional transfer instruction
Call process call
RET/retf process returns.
2> conditional transfer instruction (short transfer,-128 to + 127)
(If and only when (sf xor of) = 1, OP1 <OP2)
If Ja/jnbe is not smaller than or not equal to, it is transferred.
Jae/JNB is greater than or equal to transfer.
JB/jnae is smaller than transfer.
Jbe/JNA is less than or equal to transfer.
Test the result of the unsigned integer operation (Mark C and Z ).
JG/jnle is greater than transfer.
Jge/JNL is greater than or equal to transfer.
Jl/jnge is smaller than transfer.
Jle/jng is less than or equal to transfer.
Test the result of the signed integer operation (S, O, and Z ).
Je/JZ is equal to transfer.
Transfer when JNE/jnz is not equal.
When JC has a bid, it is transferred.
When JNC is not carried.
Transfer when jno does not overflow.
Transfer when the parity of jnp/JPO is odd.
Transfer when the JNS symbol bit is "0.
Jo overflow transfer.
If the parity of jp/jpe is an even number, it is transferred.
Transfer when the JS symbol bit is "1.
3> cyclic control commands (short transfer)
Loop CX is a non-zero loop.
Loope/loopz CX is not zero and the Mark Z = 1 is a loop.
Loopne/loopnz CX is not zero and the Mark Z is 0.
Jcxz CX is transferred at zero time.
Jecxz ECx is transferred when it is zero.
4> interrupt command
Int interrupt command
Into overflow interrupt
Iret interrupt return
5> processor control commands
The HLT processor is paused until an interruption or reset signal occurs.
When the chip lead test is high, the CPU enters the waiting state.
ESC to external processor.
Lock to block the bus.
NOP null operation.
STC sets the carry flag.
CLC flags.
The CMC carry mark is reversed.
STD indicates the position in the direction.
CLD flags in the clear direction.
STI allows interruption.
CLI clear interrupt allowed bits.

Vi. pseudoinstructions
── ─
DW definition (2 bytes ).
Proc definition process.
The endp process ends.
Segment definition segment.
Assume creates block register addressing.
The ends segment ends.
End program ends