9260 Startup Mode

9260 startup mode! A short section is summarized as follows:

1.9260 of the memory is 32bit, so the total storage space is 4 GB, divided into 16 banks each MB, where 8 banks of the bank1-bank8 are mapped to external memory, select 0 to 7 for the corresponding slices respectively, and bank0 is mapped to the internal memory for use. There are only two internal memories: Rom and SRAM.

2. Because 9260 is always started from 0, focus on who is mapped to 0. The ing is determined by two parameters: One hardware parameter, one software setting parameter, the hardware parameter is the BMS pin, and the software parameter is the remap parameter. At startup, The remap is reset to 0. So,When the BMS pin is detected to be 1, the internal ROM is mapped to address 0; when the BMS is detected to be 0, the chip mentioned above is 0, that is, the bank1 is mapped to address 0.In this way, two startup modes are implemented through the BMS pin settings.

3.First, we will analyze the case where the BMS is 0. We know that bank1, that is, the slice selects 0 as Ebi, that is, the external bus interface. Here we are connected to external memory. We know that normally, we generally start from norflash or nandflash, and the processor has reserved three parts for nandflash. therefore, if we connect norflash to the slice and select 0, we can start norflash.

4. Analyze nowWhen the value of BMS is 1, the internal ROM is mapped to address 0,The startup process is described in step 5.

5.When the Rom is mapped to address 0, the program first scans two SPI dataflash files to check whether there are eight exception vectors, that is, the content of the first 28bytes. If it is an exception vector, it indicates that the system can be guided. At this time, according to the size of vector 6, determine the size to be loaded to the SRAM. Then, under REMAP, the SRAM will be changed to address 0, and then the program will jump to address 0 for execution. If the two SPI dataflash instances do not have the corresponding vectors, they are switched to the NAND Flash detection. If eight abnormal vectors are detected, it indicates that
Flash can guide, The method is the same as above.

6. In summary:

When we need to start from the nor flash, the BMS should be set to 0, that is, low, so that the memory bank1 where the nor flash is located, that is, the EBI chip should be set to 0 and mapped to the address 0, in this case, it starts from nor flash. When we need to start from NAND Flash, BMS should be set to 1, that is, high, so that when the Rom is mapped to the program in the address 0, Rom, after detecting two SPI dataflash, when detecting that NAND Flash has a corresponding vector, the code of vector 6 marked in NAND Flash will be automatically copied to the SRAM, then re-map the Remap. In this way, the SRAM is mapped to address 0 and jumped to address 0 to start the system execution. Here, REMAP is required because it is convenient for program development, starting from 0 ~

When we start from nor flash, There is nothing special to say. At this time, we ignore the content of bank0, namely the content in the SRAM and Rom, and we can use a larger amount of SDRAM to do things. When we start from NAND Flash, a small part of the NAND Flash startup code is copied to the SRAM (at this time, the Rom is mapped to 0, and the SRAM is after it), and then REMAP, the SRAM is mapped to the address 0, and the CPU automatically jumps to the address 0, that is, the execution of a small part of the startup Code. At this time, the startup code can also be executed with a larger amount of SDRAM ~

 

 

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