Avr-at90can128 chip timer/Counter 3

Source: Internet
Author: User

Three working modes of at90can128 Timer/Counter 3:

 

Void initpwm (void)// Output compare and PWM output C for Timer/counter3
{


Tccr3a = (0 <com3a1) | (0 <com3a0) | // The scheduled/counting mode is not used in ocr3a.
(0 <com3b1) | (0 <com3b0) | // ocr3b uses the regular IO port instead of the regular/counting mode.
(1 <com3c1) | (1 <com3c0) | // ocr3c Timing/counting mode is output in PWM mode, that is, Pe5 -- oc3c -- ddre | = (1 <dde5)
(1 <wgm31) | (1 <wgm30 );
Tccr3b = (1 <wgm33) | (1 <wgm32) | // wgm33 wgm32 wgm31 wgm30 -- 1 1 1 1-> fast PWM mode
(0 <cs32) | (0 <cs31) | (1 <cs30); // No Frequency Division
 
Ocr3a = 0x7ff;
Ocr3c = 0xff;


}

 

\\

The timer/Counter 3 operation mode is set through wgmx3 wgmx2 wgmx1 and wgmx0:

The ocxn settings of Timer/Counter 3 in three working modes are set through comxn1 and comxn0:

The timer/Counter 3 clock settings are set through csx2 csx1 csx0:

Timer/Counter 3 Output comparison register ocr3a ocr3c -- when the Count value reaches the value of ocr3a, the comparison is used for output comparison interruption or output the PWM waveform on the oc3a pin:

 

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