Cisco switch, switching capacity, backboard bandwidth, packet forwarding Rate

 

The backboard bandwidth is the maximum amount of data that can be transferred between the vswitch interface processor or interface card and the data bus. The higher the bandwidth of the backboard of A vswitch, the stronger the ability to process data, but the design cost will also rise.

However, how can we check whether the bandwidth of A vswitch is sufficient? Obviously, the estimation method is useless. I think we should consider the following two aspects:

1) The sum of the total port capacity X ports should be 2 times smaller than the backboard bandwidth, enabling full-duplex non-blocking switching, proving that the switch has the conditions to maximize the data exchange performance.

2) Full configuration throughput (Mpps) = number of fully configured GE ports x 1. 488Mpps the theoretical throughput of One gigabit port when the packet length is 64 bytes is 1.488 Mpps. For example, if a vswitch can provide up to 64 Gigabit ports, its full configuration throughput should reach 64 × 1.488 Mpps = 95.2 Mpps to ensure that all ports are working at the same speed, provides non-blocking packet switching. If a vswitch can provide a maximum of 176 Gigabit ports and the declared throughput is less than 261.8 Mpps (176x1.488 Mpps = 261.8 ), the user has reason to think that the switch adopts a blocking structure design. Generally, the switches that both meet the requirements are qualified switches.

 

For example:

2950G-48

Backplane = 2x1000x2 + 48x100x2 (Mbps) = 13.6 (Gbps)

Equivalent to 13.6/2 = 6.8 Gigabit Ports

Throughput = 6.8 × 1.488 = 10.1184 Mpps

4506

Backplane 64 GB

Full configuration of Gigabit Ports

4306 × 5 + 2 (ENGINE) = 32

Throughput = 32 × 1.488 = 47.616

Generally, the switches that both meet the requirements are qualified switches.

A vswitch with a relatively large backplane and a relatively low throughput retains the ability to upgrade and expand, but it also has problems with software efficiency or dedicated chip circuit design. The backplane is relatively small. The overall performance of vswitches with relatively high throughput is relatively high. However, the Board bandwidth can be believed by the manufacturer, but the throughput cannot be believed by the manufacturer. because the latter is a design value, the test is very difficult and the significance is not great. (This sentence seems to be reversed)

The switch's back-board speed is generally Mbps, which refers to the second layer,

Mpps is used for switching between three or more layers.

Wireless Router password cracking

The utilization rate of the backboard Bandwidth Resources is closely related to the internal structure of the vswitch. Currently, the internal structure of a vswitch mainly includes the following types: first, the shared memory structure, which relies on the central switching engine to provide high-performance connections across all ports, the core engine checks each input packet to determine the route. This method requires a lot of memory bandwidth and high management costs. Especially with the increase of switch ports, the price of the central memory will be very high, so the switch kernel becomes a bottleneck for performance implementation; the second is the cross-bus structure. It can establish direct point-to-point connections between ports, which is good for single-point transmission performance, but not suitable for multi-point transmission. The third is the hybrid cross-bus structure, this is a hybrid cross-bus implementation method. Its design idea is to divide an integrated cross-Bus Matrix into small cross matrices, and connect them through a high-performance bus in the middle. The advantage is that the number of Cross buses is reduced, the cost is reduced, and the bus contention is reduced. However, the bus connected to the cross matrix becomes a new performance bottleneck.

 

Switch switching capacity

The switching capacity of a vswitch, also known as the backboard bandwidth or switching bandwidth, is the maximum data volume that can be transferred between the vswitch interface processor or interface card and the data bus. The switching capacity table shows the total data exchange capability of a vswitch. The unit is Gbps. The switching capacity of a general vswitch ranges from several Gbps to hundreds of Gbps. The higher the switch capacity, the stronger the ability to process data, but the higher the design cost.

How can we determine whether the exchange capacity of a vswitch is sufficient?

1) the sum of all port capacities multiplied by the number of ports should be 2 times smaller than the switching capacity, so that full-duplex non-blocking switching can be achieved, proving that the switch has the conditions to maximize the data exchange performance.

2) Full configuration throughput (Mpps) = number of full configuration ports × 1. 488 Mpps. The theoretical throughput of One gigabit port when the packet length is 64 bytes is 1.488 Mpps.

The utilization of switching capacity resources is closely related to the internal structure of the switch. Currently, the internal structure of a vswitch mainly includes the following types: first, the shared memory structure, which relies on the central switching engine to provide high-performance connections across ports, the core engine checks each input packet to determine the route. This method requires a lot of memory bandwidth and high management costs. Especially with the increase of switch ports, the price of the central memory will be very high, so the switch kernel becomes a bottleneck for performance implementation; the second is the cross-bus structure. It can establish direct point-to-point connections between ports, which is good for single-point transmission performance, but not suitable for multi-point transmission. The third is the hybrid cross-bus structure, this is a hybrid cross-bus implementation method. Its design idea is to divide an integrated cross-Bus Matrix into small cross matrices and connect them through a high-performance bus in the middle. The advantage is that the number of Cross buses is reduced, the cost is reduced, and the bus contention is reduced. However, the bus connected to the cross matrix becomes a new performance bottleneck.

 

What is the relationship between switching capacity and packet forwarding rate?

Forwarding bandwidth = packet forwarding rate * 8*(64 + 8 + 12) = 1344 * packet forwarding Rate

 

However, when I see the CISCO Catalyst 3560G-24TS--24 parameter, this formula cannot be verified.

Cisco Catalyst 3560G-24TS--24 Ethernet ports 10/100/1000, 4 SFP Gigabit Ethernet ports, and 1 Ru

32 Gbps forwarding bandwidth

Forwarding rate based on 64-byte grouping: 38.7 Mpps

I determined that the vswitch is not a wire speed switch. If it is a line speed, the forwarding rate = (24 + 4) * 1.48809 = 41.66652 M,

Forwarding bandwidth = (24 + 4) * 1*2 = 56G

Is the formula incorrect? But many product parameters have verified the formula.

 

Switching capacity and forwarding rate (Huawei's)

Switching capacity and forwarding rate:

1. Our low-end LSW switches all adopt the storage and forwarding mode. The size of the switching capacity is determined by the BUFFER Bit Width and bus frequency.

That is, the switching capacity = cache Bit Width * cache bus frequency = 96*133 = 12.8 Gbps

2. How is the port capacity calculated?

Our low-end LSW ports support full duplex, so the switch port capacity is twice the sum of the ports it can provide. That is,

Port capacity = 2 * (n * 100 Mbps + m * 1000 Mbps) (n: indicates that the switch has n m ports, and m: indicates that the switch has m ports ),

3. How is the forwarding capability calculated?

Our LSW all uses line rate forwarding. The test of forwarding capability is measured by the minimum packet length. For Ethernet, the minimum packet length is 64 bytes, and the frame overhead is 20 bytes. Therefore, the minimum packet speed is 84 bytes.

When a full-duplex 1000 Mbps interface reaches the line speed requirement: Forwarding capacity = 1.488 Mbps/(64 + 20) * 8bit) = Mpps

When a full-duplex 100 Mbps interface reaches the line speed requirement: Forwarding capacity = 0.149 Mbps/(64 + 20) * 8bit) = Mpps