DDR's Past and Present Life (ii)

Source: Internet
Author: User

SDRAM and DDR SDRAM


SDRAM is a long time, but we said it certainly will not be confused with DDR, we usually understand the SDRAM is the SDR SDRAM, for the first generation of SDRAM, and DDR1 for the second generation, and even to the DDR4 we use now, in fact, for the fifth generation SDRAM, There is a need for clarification here. To show the difference, the subsequent article with SDR to refer specifically to SDR SDRAM, and DDR is specifically DDR SDRAM.

As many people reply, their essential difference is the difference in the cycle operation mode (also known as clock sampling), which results in a big difference in the design behind. The SDR is a "single data transfer Mode", which is characterized by an operation (read or write) on a rising edge of a waveform in a memory clock cycle, while the DDR refers to new designs and techniques that operate once in a memory clock cycle, at the rising edge of the waveform, It is also done once on the falling edge of the square wave, which is equivalent to a single clock cycle in which the DDR can complete the SDR two cycles, so in theory the same rate of DDR memory is more than one-fold compared to SDR memory and can be understood as a 100MHZ ddr=200mhz SDR.

As for the SDR in the design of the long-term should be how to consider, I think this may be the most interested in the issue, although the application of SDR is not much, but still often people will come to ask us, the following use of personal feel better than the previous article reply to everyone also to a reference.

Two Shang netizens said: "Although all called synchronous dynamic random memory, but there is a great difference in technology, SDRAM belongs to the first generation of Ram,ddr-sdram belongs to the second generation of RAM, the use of double data rate and pre-access technology, transmission speed is the first generation of more than twice times. In layout, SDRAM is not even used as equal length, except for high performance requirements. ”

Shanshui Jiangnan Netizen said: "SDRAM is a common clock synchronization, data and clock signals do not have to wait long, but there are the longest requirements, so the line as short as possible." ”

There are other netizens also have similar views, we agree with this argument, normal if the SDR frequency under 100MHz, such as long range can be larger, relatively speaking can not be deliberately to control, and if the frequency of more than 100MHz, in the PCB design needs special attention, It is possible to calculate the equal length by an accurate timing simulation, our rule of thumb is to try to control all the lengths of the signals, preferably at a length not exceeding 3inch in a controlled situation. This is said in the time series design of the high-speed Mr. Early article, this is no longer explained.

Well, now formally back to our DDR era, such as the approximate development route and rate map of SDR to DDR4.

Figure a DDR development route and rate map

The speed of memory transfer is rapidly increasing, in addition to the progress of the chip manufacturing process, the key technology is double data rate and pre-access. In fact, the kernel frequency of the memory is basically consistent, is between 100MHz to 200MHz. The 200MHz memory core frequency is generally considered to be the limit of current technology (except overclocking). DDR technology increases data transfer speed by as much as two, and the DDR simultaneously samples data at the clock signal and the lower edge. So if the same 200MHz clock, the DDR can achieve 400MB/S data transfer speed.

Figure II Timing of DDR

The pre-access technology effectively improves the speed of data transmission inside the chip. Pre-access (Prefetch) increases the bit width of the DDR storage array, as shown in the pre-access process of the DDR2 and DDR3, as pre-access is raised from 4 bits to 8 bits, so the core frequency of the DDR3 is half that of DDR2 at the same bus frequency and data rate. Lower core frequency reduces power consumption, reduces calorific value, and improves memory work stability. At the same memory core frequency, the bus frequency and data rate of the DDR3 are DDR2 times.

Figure three DDR2 and DDR3 of the pre-access process

DDR's Past and Present Life (ii)

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