Design of DSP-based embedded micro-image processing system

Design of DSP-based embedded micro-image processing system

[Date:]

Source: Electronic Technology Application Author: Zhang huaizhu Yin Chuan Li Song Jianzhong Qiao Shuang

[Font:Large Medium Small]

　

Micro-image processing is an important field of digital image processing. With the continuous development of its technology, it has been widely used in materials, biology, medicine, and other fields [1] [2]. Currently, micro-image processing usually uses an image acquisition system to collect micro-images into a computer for image processing. In this way, although the operation speed is high, it is large and difficult to carry, it has some limitations. Therefore, using digital image processing technology and DSP technology to achieve efficient, fast, and comprehensive statistics and measurement of granular microimages has important practical value and broad application prospects.
This paper proposes and designs an embedded microimage Acquisition and Processing System Based on DSP and FPGA, as shown in 1. Among them, the image acquisition and processing device is a key component of the entire system, which takes DSP and FPGA as the core, as a central processor, DSP is responsible for image filtering, threshold segmentation, and statistical processing of the number, diameter, and area of the target. It completes various interface logic and timing matching through FPGA, and uses large-capacity memory for image storage. The DSP chip is small in size, fast in operation, and flexible in use. FPGA features flexible system programming and control logic implementation. Therefore, it can not only meet the fast processing speed, but also meet the requirements of miniaturization and portability.

 

1. system hardware platform design
The performance of a micro-image processing system based on video image processing depends largely on the structure and performance of its hardware processing unit. The hardware structure adopted by the system is mainly composed of five modules: DSP core processing unit, video image acquisition and storage module, character and graphics superposition unit, communication and user interaction interface module, and power supply module. System circuit diagram 2.

 

 

Figure 2 hardware structure of the embedded micro-image processing system

After the system is powered on, the DSP executes the BOOTLOAD program, loads the user program code from the external Flash to the internal program memory, and executes initialization operations such as A/D and character superposition. The Video Acquisition and conversion module converts analog video signals output by CCD cameras to digital image data and stores them in RAM. After an image is collected, the field synchronization signal notifies the DSP through FPGA in an interrupt mode. The DSP reads the image from RAM and completes various processing algorithms such as image filtering, segmentation, and measurement, the measurement result is displayed on the monitor screen through the character graphics superposition unit. The communication interface module can also be sent to the host as needed. Various interface logic and timing control are implemented by programming in FPGA Devices.
Analog video signals are divided into two channels: one is converted into digital image signals by A/D, and the other is superimposed with the video overlay chip MAX442 and character overlay chip μd6453 for graphics and character Overlay display. The SAA7111A of Philips is used as the video A/D decoding chip. It converts the analog video signal output by the CCD camera into digital image data and stores it in RAM under the control of FPGA, at the same time, line synchronous signals (HS), field synchronous signals (VS), parity field signs (RTS0), and pixel clock signals (LLC2) are generated. MAX442 is a dual-channel video signal amplifier with a gain bandwidth of up to 140 MHz. μ PD6453 is a character generation chip used in video devices by NEC. The characters and graphics to be displayed are superimposed on the monitor screen together with the original image output by the CCD camera.
During image acquisition, the video decoding chip SAA7111A outputs digital image data in YUV format at pm. In this format, the resolution of each frame is 720 × 576, that is, each line has 720 pixels and each frame has 576 rows, since a frame of image is composed of odd and even two images, each image has 288 rows. For processing convenience, the size of each image collected is 512 × 256, that is, 512 pixels are collected per line, and 256 rows are collected per line (odd or even field, by programming in FPGA, pixel latency and row latency are achieved. 512 pixels in the middle of each line and 256 rows in the middle of each line are selected.
2 Software Design
Traditional DSP programs are implemented in a single-threaded sequential structure, with poor real-time performance and low resource utilization, making it difficult to meet practical requirements in High-Speed and real-time image processing. Code Composer Studio is a complete DSP integrated development environment. It not only integrates conventional development tools, such as the source Editor, code generation tools (compilation, linker), and debugging environment, it also provides DSP/BIOS development tools. DSP/BIOS is a simple embedded operating system, which only occupies a very small amount of CPU resources and can be tailored to greatly facilitate the compilation of multi-task applications, enhance the monitoring of code execution efficiency, improve program readability, facilitate the compilation of your applications, and shorten the software development cycle.
2.1 software program diagram
Based on DSP/bios, this paper designs and develops the DSP application of the microimage processing system. Use hybrid programming, use C language to design modules that have little impact on the running time, and use assembly language to design Core algorithms that strictly require real-time performance. Here, the program adopts a modular design, and each functional module is independent of each other, as shown in figure 3. The program consists of one main program initialization module, three hardware interrupt Hwi processing modules, one software interrupt SWI processing module, and four Task Modules Tsk.

 

After the system is reset, the DSP executes the bootload boot program and sets the program entry point to c_int00. The DSP/BIOS application starts to run from this point. The execution process is as follows: first, call the DSP/BIOS initialization module, and call the main function main (). The main () function is responsible for completing hardware resource allocation and initialization settings for various peripheral chip operating methods; start the DSP/bios and enter the idle cycle. At this time, the application is completely driven by hardware interruption. The corresponding function module is executed only when the interruption occurs. After the execution is complete, the idle loop program is executed.
2.2 Image Processing Algorithm Design
After an image is collected, FPGA notifies the DSP in the interrupt mode, triggering the int0 interrupt of the DSP. Because the interval between an image is 20 ms, the interruption is triggered every 20 ms. Start the Keyboard Scan SWI in the interrupt handler vs_interrupt (). If a key is pressed, execute the corresponding image processing program.
Micro-images are greatly affected by the light intensity of the light source. The collected images are usually of poor quality and uneven brightness, and the target area is not easy to be separated from the background area. Therefore, we need to first filter the image, then use the adaptive threshold method to extract the target from the background, and use the mathematical morphology method to further remove noise, finally, the statistical measurement and calculation of the target in the image are completed.
First, use the median filter to smooth the image. The window size is 3 × 3 and the cross window is used. While maintaining the edge of the target image, the median filter removes the peak interference to make the brightness of the image background more uniform, facilitating further image segmentation and processing.
Due to the illumination intensity of the light source, the gray-scale value of the background varies greatly in the entire image. If you only use a fixed global threshold to split the entire image, however, the splitting effect is affected because it does not take into account all aspects of the image. To improve the segmentation accuracy, a dynamic threshold segmentation method that slowly changes with the background gray value can be used, that is, the adaptive threshold algorithm. The specific method is: first, the original image is divided into a series of sub-images. Because the sub-image is relatively small than the original image, it will be less affected by problems such as shadow or contrast space changes; then, a local threshold value is calculated for each subgraph. Finally, by linear interpolation of the threshold values obtained for these subgraphs, a reasonable threshold value is obtained for segmentation of each pixel in the original image. After the split binary image is used in the mathematical morphology transformation, the open and closed operations and appropriate operators can be selected to effectively eliminate a small number of noise points in the image, which is conducive to the next step.
Here, the most inter-class variance method [6] is used for calculating the local threshold value. The formula is as follows:

Where: σ 2 (T) is the maximum variance between the two classes, WA is the target probability, μ a is the average gray level of the target, WB is the background probability, and μ B is the average gray level of the background, μ indicates the average gray scale of the image. That is, the threshold T divides the image into two parts: A and B, so that the total variance σ 2 (T) of the two classes gets the maximum T, that is, the best segmentation threshold.
In order to measure the number of targets and the geometric features such as the diameter and area in the microscopic image, the algorithm of marking and classifying the target regions of the binary image is adopted [7]. First, the target area of the binary image is scanned from left to right, top-down, and marked if it is the target point, in addition, the target image belonging to the same particle is assigned the same value according to the eight-connection principle. Marked classification algorithm 4. Because the geometric shape of the target is irregular, a single scan cannot distinguish all the targets. Therefore, a second-value image must be scanned multiple times. Figure 4 (a) indicates a binary image (the black area is the target, and the white area is the background). Figure 4 (B) indicates a tag of the target area. Figure 4 (c) the result of the final mark. Here, number 1 indicates destination 1, and number 2 indicates destination 2. As shown in figure 4, the marking of the No. 1 target can be completed after one scan, while the marking of the No. 2 target can be completed only after a second scan. After the target image is labeled and classified, the number, diameter, area, perimeter, and other features of the target can be conveniently measured.

 

3. Experiment results
In order to verify the reliability of the system, a large number of collection processing and statistical measurement experiments were carried out on the image of the oil film particles from the microscope. Figure 5 (a) is a particle microscopic image collected on the site. The image size is 512 × 256. Due to the illumination intensity of the light source, the background of the entire image is uneven. Figure 5 (B) is an image after adaptive threshold binarization. The target region and the background region have been separated, although there are still a small number of noise points, however, after mathematical morphology transformation, the statistics of particles can be accurately calculated.

 

In the statistical measurement process, the target with an area less than three pixels is omitted as noise interference, and only the target with an area greater than or equal to three pixels is counted. To facilitate further analysis and comparison, the target is divided into nine grades based on the number of pixels: 3 ~ 10, 11 ~ 20, 21 ~ 30, 31 ~ 40, 41 ~ 50, 51 ~ 60, 61 ~ 70, 71 ~ 80 and 81. The number of particles, the average area, and the proportion of each grade are calculated, as shown in table 1. In the experiment, when the DSP chip TMS320VC5416 operates at a maximum operating frequency of MHz, the program runs for about 15 ms. Since the video collection is paled and the time of an image is 20 ms, the real-time performance requirement can be met.

 

In this paper, an embedded micro-image processing system using TMS320VC5416 as the core component of image processing is proposed, and an application program based on DSP/BIOS is designed. The adaptive threshold algorithm is used to accurately divide the collected images, and the scanning marking algorithm is used to measure the microscopic images of the oil film particles. The experimental results show that the statistics of granular micro-images can achieve a comprehensive, objective, convenient and automatic effect, and can be applied to the statistics and analysis of various micro-images, it is highly practical.
References
[1] research on micro-image acquisition and analysis system of Rice Pollen particles in Xin Li, Hu MahaI, Zhou shaoguang [J]. application optics, (1): 43-45.
[2] Yu Sai, Yu Huimin, Liu Yuanyuan. method for separating overlapping circular images based on particle size measurement [J]. journal of Zhejiang University (engineering edition), 962 (7): 966.
[3] TMS320VC5416 Fixed-Point Digital Signal Processor Data Manual, SPRS095O [J]. Texas Instruments.
[4] Qingyuan technology. TMS320C54X DSP hardware development tutorial [M]. Beijing: Machinery Industry Press, 2003.
[5] Pan song, Huang Jiye. EDA technical practical tutorial [M]. Beijing: Science Press, 2002.
[6] otsu n. A threshold selection method from gray-level histogram [J]. IEEE Trans, 1979, SMC-15: 652-655.
[7] Chen zhongbi, Zhang Qiheng. An image segmentation method suitable for multi-object detection [J]. optoelectronic engineering, (5): 34-37.