EMMC/SD Driver Code Preview

Before we do a detailed driver analysis, we'll preview the code structure.

Linux source in the \DRIVERS\MMC directory, there are three folders, respectively: Card, core, cast. So what's the effect of them all?

The following content is mainly derived from: eMMC drive.

One, card (block layer)

Main child files: block.c, Queue.h, queue.c.

Role: Mainly according to the framework of LINUX block device driver to achieve a card block device driver;

BLOCK.C: In this file, we can see the definition of the block_device_operations structure variables needed to write a block device driver, in which the OPEN/RELEASE/IOCTL function is implemented;

QUEUE.C: It is the encapsulation of the request queue provided by the kernel, we do not need to understand it at the moment, just know that a block device needs a request queue.

Second, core (key layer)

Main child files: bus.h/.c, core.h/.c, HOST.H/.C, mmc.c.
Function: The core layer encapsulates the commands of the MMC/SD card, such as memory card identification, setting, reading and writing. For example, no matter what card should have some identification, settings, and read and write commands, these processes are necessary, but specifically for different cards will have some unique operation.
Bus: Related to the operation of buses, connecting the drive and equipment bridge;
Core: Provide storage card related operations, core.c by SD.C, mmc.c two files supported, core.c the MMC card, SD card of the generality of the abstract, their differences by the SD.C and SD_OPS.C, MMC.C and mmc_ops.c to complete.
Host: The main is to manipulate and obtain the host clock parameters, for our analysis of the code is not important.

Third, host (main control layer)

There are too many files to list.

Host controller is dependent on different platforms, such as S3C2410 Card controller and Atmel card controller must be not the same, so to the different controller to achieve. Take S3CMCI.C as an example, it must first make some settings, such as interrupt function registration, universal controller and so on. Then it will register a host to the core layer, with the structure mmc_host_ops description, so that the core layer can hold the host to operate S3C24XX card controller, and specifically S3C24XX Card controller or Atmel card controller, core Layers are not to be known.