Fet: FET

FET

Open Category:Electronics

Fet: FET A new generation of amplification elements developed based on the principle of the transistor has three polarity, the gate, the drain pole, and the source pole. It features a high internal resistance of the gate, silicon dioxide is a voltage-controlled device that can reach hundreds of megabytes of Euro. -------------------------------------------------------------- 1. concept: Field effect transistor (FET) is short for the field effect transistor. It is conductive by the majority of carriers, also known as a single pole transistor. It is a voltage-controlled semiconductor device. Features: High Input Resistance (108 ~ 109 Ω), low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown, safe working area width, and other advantages, has become a strong competitor of Bipolar Transistor and power transistor. Purpose: The field effect transistor can be used for amplification. Due to the high input impedance of the field effect transistor amplifier, the coupling capacitor can have a small capacity and does not need to use electrolytic capacitors. The FET can be used as an electronic switch. The high input impedance of the FET is very suitable for Impedance Transformation. It is often used for Impedance Transformation at the input level of the multilevel amplifier. The FET can be used as a variable resistance and can be conveniently used as a constant current source. 2. Category of FET: Two types of FET junction and insulation grating (MOs) Channel-based materials: the junction and insulation grating are divided into two types: N-channel and p-channel. Conductive mode: Depletion mode and enhanced mode, and junction mode are both Depletion mode. Insulation grating mode has both Depletion mode and enhanced mode. The field-effect transistor can be divided into the junction field-effect transistor and the mos field-effect transistor, And the mos field-effect transistor can be divided into N-channel depletion type and enhanced type. The P-channel depletion type and enhanced type are listed below: 3. Main Parameters of the FET: IDSS-Saturated Leakage source current refers to the leakage source current when the gate voltage UGS is 0 in the junction or depletion insulated gate FET. Up-Pinch-off voltage refers to the gate voltage when the leakage source is just cut off in the junction or depletion insulated gate FET. Ut-enable voltage refers to the gate voltage when the leakage source is just turned on in the enhanced Insulated Gate tube. GM-cross-channel. indicates the control capability of the grid source voltage UGS to the drain current ID, that is, the ratio of the drain current ID variation to the UGS variation of the grid source voltage. GM is an important parameter for measuring the amplification capability of the Fet. BVDS-leakage source breakdown voltage. it refers to the maximum leakage source voltage that the FET can withstand when the gate source voltage UGS is fixed. this is a limit parameter, and the operating voltage added to the FET must be smaller than BVDS. Pdsm-maximum dissipation power, also a limit parameter, refers to the maximum leakage source dissipation Power allowed when the performance of the FET does not deteriorate. in use, the actual power consumption of the FET should be less than that of pdsm and a certain margin is left. IDSM-maximum leakage source current. It is a limit parameter. It refers to the maximum current allowed to pass between missing sources during normal operation of the FET. The operating current of the FET should not exceed IDSM. 4. Pin identification of the junction FET: Determine the gate G: dial the multimeter to the r × 1k file, use the negative pole of the multimeter to connect one electrode, and the other table pen to contact the other two poles in sequence to test its resistance. if the measured resistance values are approximately the same, the negative table pen is in contact with the gate, and the other two electrodes are drain and source poles. the drain and source pole are interchangeable. If the measured resistance is large twice, the channel is N. If the measured resistance is small twice, the channel is P. Determine source Pole s and drain pole D: There is a PN knot between the source-drain. Therefore, the S pole and D pole can be identified based on the difference between the positive and reverse resistance of the PN junction. use the exchange table pen method to test the resistance twice, where the resistance value is low (usually from several thousand euros to a dozen thousand euros). At this time, the black table pen is S pole, red table pen connected to d pole. 5. Comparison between common effect tubes and transistor The FET is a voltage control element, while the transistor is a current control element. when only less current is allowed from the signal source, the field effect tube should be selected. When the signal voltage is low and more current is allowed from the signal source, the transistor should be selected. Most carriers are used for conducting electricity. Therefore, the FET is called a single-pole device, while the transistor is also called a dual-pole device. The source pole and drain pole of some FET can be used interchangeably, the gate pressure can also be positive and negative, and the flexibility is better than that of the transistor. The FET can work under low current and low voltage conditions, and its manufacturing process can easily integrate many FET tubes into one silicon wafer, therefore, FET has been widely used in large-scale integrated circuits.