The following are two articles about Linux I/O port ing and I/O memory ing. I have no time to understand the time relationship. Please take a look.
CPU address space
(1) concept of address
1) physical address: the address sent from the CPU address bus, which is controlled by the hardware circuit. A large part of the physical address is reserved for memory in the memory, but it is often mapped to other memory.(Such as video memory and BIOS ). After the virtual address in the program instruction passes the field ing and page ing, a physical address is generated, which is placed on the address line of the CPU.
The physical address space is used by the physical RAM (memory) and the bus. This is determined by the hardware design.In the bits x86 processor, the physical address space is 2 to the power of 32, that is, 4 GB, but physical Ram generally cannot reach 4 GB, because some of them need to be used for the bus (there are otherMany devices ). In PCS, low-end physical addresses are generally used for ram, and high-end physical addresses are used for bus.
2) BUS address: the BUS address line or signal generated during the address cycle. The peripherals use the BUS address and the CPU uses the physical address.
The relationship between the physical address and the BUS address is determined by the system design. On the X86 platform, physical addresses are bus addresses because they share the same address space.Independent addressing ". Conversion/ ing may be required on other platforms. For example, if the CPU needs to access a unit whose physical address is 0xfa000, a PCI bus is generated on the X86 platform.Access to the 0xfa000 address. Because the physical address is the same as the BUS address, it cannot be determined by your eyes where the address is used, whether it is in memory or a storage unit on a card,It is even possible that there is no corresponding storage on this address.
3) Virtual Address: Virtual Memory Management (virtualMemoryManagement) mechanism, which requires MMU (memoryManagementUnit. MMU is usually a part of the CPU. If the processor does not have MMU, or MMU is not enabled, the memory address sent by the CPU Execution Unit will be directly transmitted to the Chip PinMemory chip (physical memory) Receiving, which is called physical address (physicalIf MMU is enabled, the memory address sent from the CPU execution unit is intercepted by MMU.And MMU translates this address into another address and sends it to the external address pin of the CPU chip, that is, ing the virtual address into a physical address.
In Linux, the 4 GB (virtual) memory of a process is divided into user space and kernel space. User space distribution is 0 ~ 3 GB (page_offset, which is equal0xc0000000)
And the remaining 1 GB is the kernel space. Programmers can only use virtual addresses. Each process in the system has its own private user space (0 ~ 3G), this space is invisible to other processes in the system.
When the CPU sends a request to fetch commands, the address is the virtual address of the current context. MMU then finds the physical address of the virtual address from the page table to complete the retrieval. A virtual address is used to read data, such as mov.Ax,Var.During compilation, VaR is a virtual address. It also uses MMU to find the physical address from the table, and then generates the bus sequence to get data.
(2) Addressing Method
1) peripherals are all performed by reading and writing registers on the device. The peripherals register is also called "I/O port", and the IO port has two addressing methods: Independent addressing and unified compiling.
Unified addressing: the I/O registers (I/O Ports) in the peripheral interfaces are the same as those in the primary storage unit. Each port occupies the address of a storage unit and is allocated as an I/O address space, for exampleIn the PDP-11, the highest 4 K primary memory as the IO Device Register address. The port occupies the address space of the memory, reducing the storage capacity.
The unified addressing is also called the "I/O memory" method. The peripheral registers are located in the "memory space" (many peripherals have their own memory and buffer zone, the registers and memory of peripherals are collectively referred to as "I/O space ").
For example, Samsung's S3C2440 is a 32-bit ARM processor whose 4 GB address space is divided by peripherals and ram:
Zero x 80001000 LED8*8 lattice addresses
Zero X 48000000~Zero X 60000000 SFr (special temporary storage) Address Space
Zero X 38001002 Keyboard address
Zero x 30000000~Zero X 34000000 SDRAM Space
Zero X 20000020~Zero X 2000002e IDE
Zero X 19000300 CS8900
Independent addressing (separate addressing): the IO address and the storage address are separated and the I/0 port address does not occupy the address range of the storage space. In this way, there is another IO location in the system that is irrelevant to the storage address.The CPU must also have Io commands (In, out, etc.) and control logic dedicated to input and output operations. Under an independent address, an address is provided on the address bus. The device does not know whether it is for the I/O port orMemory, so the processor uses memr/memw and IOR/Iow control signals to achieve different addressing of the I/O port and memory. Such as IntelThe 80 X server uses a separate address. The CPU memory and I/O are co-located, that is, some of the memory addresses overlap with I/O addresses.
The independent address is also called the "I/O port" mode, and the peripheral registers are located in the "I/O (Address) Space ".
For the X86 architecture, access through the in/out command. The PC architecture has a total of 65536 8bit I/O ports, which constitute 64 k I/O address spaces, numbered from0 ~ 0 xFFFF, there are 16-bit, 80 x86 with a low 16-bit address line A0-A15 to address. Two 8-bit ports can form a 16-bit port, and four consecutive ports can form one32-bit port. The I/O address space and the physical address space of the CPU are two different concepts. For example, the I/O address space is 64 KB, and the physical address space of a 32bit CPU is 4 GB.For example, in intel8086 + redhat9.0Use more/Proc/ioports:
2017-001f:Dma1
0020-003f:Pic1
0040-005f:Timer
0060-006f:Keyboard
0070-007f:RTC
0080-008f:DMAPageReg
00a0-00bf:Pic2
00c0-00df:Dma2
00f0-00ff:FPU
0170-0177:Ide1
......
However, IntelThe X86 platform uses a technology called memory o ing (mmio), which is part of the PCI specification. After the I/O device port is mapped to the memory space, CPU access to the I/O port is like accessThe memory is the same. View intelTa719 the typical Memory Address Allocation Table for x86/x64 systems is as follows:
System Resources Occupied
------------------------------------------------------------------------
Bios 1 m
Local APIC 4 K
Chipset reservation2 m
IoAPIC 4 K
PCI device 256 m
PCIExpress Devices256 m
PCI device (optional)256 m
Show frame Cache16 m
Tseg 1 m
For an established system, it is either an independent address or a unified address. The specific method depends on the CPU architecture.For example, PowerPC and m68k adopt uniform addressing, while x86 adopt independent addressing, which has the concept of Io space. Currently, most embedded controllers such as arm and powerpcI/O space is not provided, and only memory space is available. It can be accessed directly using addresses and pointers. But for Linux kernel, it may be used for different CPUs, so it must consider both methods, so it usesA new method is used to call the I/O port based on I/O ing or memory ingRegion). No matter which method you use, you must first apply for the IO region: request_resource () and release it at the end.It is release_resource ().
2) Access to peripherals
1. The process for accessing the I/O memory is: request_mem_region ()->Ioremap ()->Ioread8 ()/iowrite8 ()->Iounmap ()->Release_mem_region ().
As mentioned above, I/O memory is the concept of uniform addressing. For uniform addressing, I/O address space is part of the physical master memory. for programming, we can only operate on virtual memory, the first step is to map the physical address of the device to a virtual address. ioremap () is used in linux2.6 ():
Void* Ioremap (unsignedLongOffset,UnsignedLongSize );
Then, we can directly access these addresses through pointers, but we can also use a set of functions in the Linux kernel to read and write:
Ioread8 (),Iowrite16 (),Ioread8_rep (),Iowrite8_rep ()......
2. Access the I/O port