PCB optimization Design (ii) reprint

PCB Optimization Design (II.)

2011-04-25 11:41:05| Category: PCB design

SMT technology is now very mature and widely used in electronic products, therefore, electronic product designers need to understand the SMT technology common Sense and manufacturability design (DFM) requirements. SMT process products, at the beginning of the design should be integrated into consideration of the production process, raw material selection, equipment requirements, device layout, test conditions and other elements, as far as possible to shorten the design time, to ensure the design to the manufacture of one-off success.

3.5 Component Layout Design

Component layout is in accordance with the requirements of the schematic diagram and the packaging of components, the components neat, beautiful arrangement on the PCB, to meet the process, testing, maintenance and other aspects of the requirements, and meet the circuit function and performance requirements. The design of component layout should be the least process, the best process. The basic principles of component layout design are as follows:

(1) The arrangement of components evenly, as far as possible to achieve the same type of components in the same direction, the same function of the module set together, the same structure of the circuit should be as far as possible symmetrical layout.

(2) Component layout according to "first difficult after easy, first big after small" layout principle, that is important unit circuit, core components should be priority layout, other components around it for layout.

(3) There are interconnected components should be close to the arrangement, in order to ensure the shortest route distance, conducive to improve the wiring density.

(4) Shorten the connection between the high-frequency components, reduce their distribution parameters and electromagnetic interference between each other. Components that are susceptible to interference should be isolated or shielded.

(5) For thermal sensitive components (in addition to temperature detection components), wiring should be away from the heat of large components. Heating elements should be evenly distributed, arranged in a good position of ventilation, heat dissipation, in order to facilitate the single board and the overall heat dissipation.

(6) strong signal and weak signal, high voltage signal and weak voltage signal should be completely separated, analog signal and digital signal separation, high-frequency signal and low-frequency signal separation, high-frequency components of the interval should be sufficient.

(7) Large thermal capacity of the components arrangement should not be too concentrated, so as to avoid low local temperature caused by poor welding.

(8) for potentiometers, adjustable inductors and other adjustable components of the layout should consider the structure of the machine requirements. If in-machine adjustment, should be placed on the PCB easy to adjust the place, if the outside of the adjustment, the position of the adjustment knob on the chassis panel position to adapt.

(9) The arrangement of components to facilitate commissioning and maintenance, QFP, BGA, PLCC and other devices around to leave a certain amount of maintenance space.

(10) tall, expensive components should not be placed on the edge of the PCB or near the plug-in, mounting holes, slots, v-cut and other high stress concentration areas, reduce cracking or cracks.

(11) To consider whether the socket, connectors and other components between interference, and structural design is contradictory.

(12) The same type of cartridge components in the X or Y direction should be placed in one direction. Polarity-mounted components of the same type as far as possible in the X or Y direction consistent, easy to produce and inspection, the same board can be up to 2 directions.

(13) The welding surface of the SMT components using wave soldering process, the long axis of the resistance, container parts and the direction of the wave soldering transmission perpendicular, resistance and sop (foot spacing ≥1.27mm) components long axis direction and wave soldering direction of transmission parallel, pitch <1.27mm sop, PLCC, QFP and other components to avoid soldering with wave soldering, BGA, CSP, QFN and other components are strictly forbidden to use wave soldering. As shown in Figure 3.4a on the following page.

The QFP device should be arranged in a 45-degree direction and increase the stolen solder pads. SOP and other devices should also increase the desoldering pad. As shown on the following page, Figure 3.4b. Smaller components should not be discharged in large components, so as to avoid large components to block the tin flow with smaller components pad contact, resulting in leakage welding.

(14) Reflow soldering and wave soldering process to the component layout restrictions. Different SMT assembly process, the component layout has different requirements, such as 0402 package components can reflow soldering but not suitable for wave soldering. Please refer to table 3-5 below for details.

3.6 PCB Cabling Design

Cabling is based on schematic and wire table layout PCB conductors, the general principles of cabling are as follows:

(1) Routing priority
　　
Density priority principle: from the PCB connected to the most complex device to start wiring, from the PCB wiring the most dense area to begin cabling.
Core priority principle: such as DDR, RAM and other core parts should be priority cabling, similar signal transmission line should provide the special layer, power supply, ground circuit. Other secondary signals need to be holistic and cannot be incompatible with key signals.
Key signal Line Priority principle: power supply, analog small signal, high-speed signal, clock signal and synchronous signal, such as key signal priority wiring.
Wiring layer Selection Principle: In order to meet the requirements of the premise, the choice of routing priority for single-layer cabling, followed by two-tier cabling, and finally multilayer wiring.

(2) As far as possible for the clock signal, high-frequency signal, sensitive signal and other key signals to provide a dedicated wiring layer, and ensure its minimum loop area. The method of manual priority wiring, shielding and increasing safety spacing should be adopted to guarantee the signal quality.

(3) The EMC environment between the power supply layer and the stratum is poor, should avoid the arrangement to the interference sensitive signal.

(4) The network with impedance control requirements should be arranged on the impedance control layer, the same impedance of the differential network should be the same line width and line spacing. For the clock line and high-frequency signal line according to its characteristic impedance requirements to consider the line width, to achieve impedance matching.

(5) The input and output of the wire should try to avoid adjacent parallel. It is better to add line between the ground, in order to avoid the feedback coupling.

(6) Digital and analog to separate, the low-frequency circuit, the ground should try to use a single point and join the ground, high-frequency circuit should be multi-point series grounding. For digital circuits, the ground should be closed to synthesize loops to improve noise resistance.

(7) The printed wire is generally rounded at the corner, while the right angle or angle in the high-frequency circuit will affect the electrical performance.

(8) The curve is generally rounded to avoid the right angle or angle, otherwise in the high-frequency circuit will affect the electrical performance. As shown in 3.6.

(9) The minimum width of the wire is mainly determined by the adhesion strength between the conductor and the insulating substrate and the current value flowing through them. The minimum distance between wires is mainly determined by the worst-case insulation resistance and breakdown voltage.

(10) The common power cord and ground on the double-sided board are placed as close as possible to the edge of the plate and distributed on both sides of the plate. Multilayer boards can be installed in the inner layer of the power supply layer and ground layer, through the metallization hole and each layer of the power cord and ground connection.

(11) When the pad and the larger area of the conductive area connected, should be the length of not less than 0.5mm thin wire for thermal isolation, thin wire width of not less than 0.13mm.

(12) Adjacent layer signal line is orthogonal direction, in order to reduce the coupling, avoid adjacent layer alignment or parallel line.

Hole Design for 3.7 PCB

Common holes in the PCB are mounting holes, locating holes, component holes, vias, blind holes and buried holes, test holes, etc.

(1) mounting hole (mounting Hole)

Mounting holes are used to assemble the device, or to secure the PCB, and the mounting holes should match the position dimensions and tolerances of the mounting device.

(2) Locating hole (tooling Hole)

The locating hole is a non-metallic hole which is placed on the edge of the board for the production and assembly of the circuit board. See article 3.3 for details.

(3) Component Hole (Component Hole)

A component hole is a hole used for the electrical connection of a component terminal to a printed circuit board and a conductive graphic. The aperture of the component hole should be larger than the diameter of the installed component lead 0.2~0.3mm.

(4) through Hole (Via Hole)

A through hole, also known as a hole, is a metallization hole for an inner connection, but is not used to insert a component lead or other reinforcing material. Aperture size and vacancy can be adjusted according to the size of the wiring space, the general aperture to take φ0.3~φ0.8mm, the metal hole resistance value of not more than 300μω. The PCB thickness determines the minimum over hole of the board, and the thickness aperture ratio of the plate should be less than 5~8, as shown in table 3-7 below.

Under the allowable conditions of the wiring space, the through hole is usually not placed under the component to facilitate inspection and maintenance. On-through hole and SMD pad minimum distance of 0.5mm, if over vent plugs green oil, the minimum distance is 0.25mm. As shown in 3.7.

(5) blind Hole (Blind via) and buried hole (buried via)

The blind hole is a hole that connects the surface and the inner layer without penetrating, and the hole is the hole that the inner layer and the surface cannot see. The use of blind hole and buried hole design should be fully aware of the PCB processing process, to avoid the PCB processing caused unnecessary problems, if necessary, and PCB suppliers to negotiate.

(6) Testing hole (test Pattern)

Test holes are used for ICT testing purposes of the vias, can also be done through the hole, in principle, no limit to the diameter of the pad should not be less than 25mil, the center distance between the test hole is not less than 50mil.

3.8 testability Design

SMT testing includes on-line testing (In-circuit testing,ict) and functional Testing (Function-circuit TESTING,FCT). In order to ensure the quality of mass-produced products, ICT and FCT are needed, and the testability of SMT is mainly for ICT. In the PCB design phase must consider adding test points, the relevant design requirements are as follows:

(1) test points evenly distributed across the entire PCB, it is generally required that each network must have at least one Test probe to contact the testing point.

(2) Priority of the test point selection: preferably a round pad, followed by the device pinout, the last hole is the most test point. SMD devices preferably using a circular pad to do test points, OSP processing process PCB should not be used to do test points. When using a surface pad as a test point, the test point should be placed as far as possible on the weld surface.

(3) test pad size of minimum 0.6mm, when there are more PCB rich space, the test pad set to 0.9mm or more. The minimum spacing for two individual test points is 1.5mm, and the recommended value is 2.0mm. As shown in 3.8a.

(4) Test points can not be covered by silk screen, screen printing will occur when the contact is bad. Test points can not be blocked by barcode, tape and so on.

(5) The distance between test point and SMD is at least 1.25mm, the distance between test point and IC device is at least 2.0mm, and the distance between test point and dip plug hole is 1.25mm. The test point should not be less than 5mm from the board edge. As shown in 3.8b.

(6) When the test point is added, the additional line should be as short as possible. As shown in 3.8c.

(7) When using a circular pad as a test point, if the PCB surface treatment process for OSP, it is recommended to test the solder pad printed solder paste to enhance the reliability of testing.

(8) For connector devices, if the lead is thicker or pitch≤1.5mm, it is necessary to separate the test points. As shown in 3.8d.

(9) For VLSI and ASIC devices with boundary scan (Boundary-scan) devices, additional test points for the boundary scan function should be added to meet the requirements for testing the internal functional logic of the device itself.

3.9 PCB Thermal Design

With the size of the SMD smaller, increase the density of the assembly, if not timely and effective heat dissipation, will affect the working parameters of the circuit and even the components will fail, so the thermal design must be considered.

(1) High-temperature devices should be considered in the outlet or conducive to the position of convection, higher components should be considered in the outlet, and does not block the wind path.

(2) The placement of the heatsink should be considered conducive to convection.

(3) High calorific component frame design, temperature-sensitive devices should be considered away from the heat source.

(4) for self-temperature rise of more than 30 ℃ heat source, general requirements: a. In the air-cooled condition, the temperature-sensitive devices such as electrolytic capacitors from the heat source distance requirements ≥2.5mm;b. Under natural cooling conditions, the temperature-sensitive devices such as electrolytic capacitors are ≥3.0mm from the heat source distance.

(5) Large Area copper foil is required to be connected to the pad by the tropics. In order to ensure good tin, in the large area of copper foil on the components of the pads are required to be connected with the pad, for more than 5A of large current of the pad can not be used insulation pad. 3.9 is shown below:

(6) Set the thermal through hole, can effectively transfer the heat from the top of the PCB copper layer to the internal or the bottom copper layer

3.10 Anti-Electromagnetic interference design

The problem of electromagnetic interference is becoming a serious problem in electronic products. Experience shows that the solution cost of electromagnetic interference after product mass production is more than 10 times times the cost of the development phase, or even dozens of times times, so the electromagnetic compatibility design should run through the whole process of electronic product design. The commonly used electromagnetic compatibility design methods are:

(1) from the angle of reducing radiation interference, we should choose Multilayer board as far as possible. The inner layer is made of power layer, ground layer, power layer and ground as close as possible, clock line, signal line and ground position as close as possible to obtain the minimum grounding line impedance, suppress the common impedance noise. A uniform grounding surface is formed on the signal, which increases the distribution capacitance between the signal line and the ground, and suppresses its ability to radiate to space.

(2) power line, ground, printed board line to high-frequency signal should be kept low impedance, in the case of high frequency, the power line, ground or printed circuit board will become a small antenna to receive and transmit interference, reduce this interference in addition to the method of filtering capacitors, more attention is paid to reduce power lines, ground, The high-frequency impedance of the printed board's thread itself. Therefore, all kinds of printed circuit board should be short and thick, the line should be uniform.

(3) To reduce the signal line and return line between the formation of the loop area. The wiring of power cord, ground wire and printed board should be arranged properly, as far as possible to short, wide and straight. The line should avoid the sharp angle and right angle, produce unnecessary radiation, and the process performance is not good.

(4) When there are different functional circuits on the circuit board, different types of circuits (digital, Analog, power) should be separated, and its grounding should be separated. As shown in 3.10a.

(5) For multilayer circuit boards, different areas of the ground surface in the remote to meet the 20H law (that is, the edge of the ground surface than the power layer or signal line layer of the Edge epitaxial 20h,h is the ground surface and signal line layer between the height). As shown in 3.10b.

(6) 3W principle. When two printed lines are spaced for an hour, electromagnetic crosstalk between the two lines can occur, and crosstalk can cause the circuit to malfunction. To avoid such harassment, the width of the printed line, which is not less than three times times the width of the printed line, should be maintained for any line spacing not less than 3w,w. As shown in 3.10d.

(7) Overlapping power supply and ground layer rules. The different power layers have to avoid overlapping in space. Mainly in order to reduce the interference between different power supply, especially some voltage difference between the power supply, the power plane overlap problem must try to avoid, it is difficult to avoid when you can consider the middle interval strata. As shown in 3.10e.

(8) Select the surface mount device as far as possible, and select small size components as far as possible. Because the interconnect length of the SMD device leads is very short, the inductance, capacitance, and resistance of the leads are much smaller than the dip devices.

(9) Comprehensive use of grounding, shielding and filtering measures.

Anti-ESD design for 3.11 PCB

As ICS are manufactured using more advanced process technologies, they become more vulnerable to ESD damage, and as data rates increase, they must provide both good signal integrity and ESD protection. Therefore, the electrostatic discharge protection design of electronic products is very important. PCB's anti-ESD design can be achieved through the layered design of PCB, proper layout and wiring and installation.

(1) Use multilayer PCB as much as possible. Relative to the double-sided PCB, the ground plane and the power plane and the tightly arranged signal line-ground spacing can reduce the common-mode impedance and inductive coupling, so as to achieve the 1/10~1/100 of the double-sided PCB. Try to keep each signal layer close to a power or ground layer, with components on the top and bottom surfaces, high-density PCBs with very short connectors, and many fill-in layers, consider using inner lines.

(2) for double-sided PCB, the use of tightly interwoven power supply and ground grid. The power cord is close to the ground and is connected as much as possible between the vertical and horizontal lines or the fill area. One side of the grid size ≤60mm, if possible, the grid size should be <13mm.

(3) Ensure that each circuit is as compact as possible and put all connectors on one side.

(4) to set a ring around the circuit in the following manner: In addition to the edge connector and the chassis ground, around the entire periphery of the ring-like path, to ensure that all layers of annular width of more than 2.5mm, every 13mm with the hole will be connected to the ring, the ring is connected with the multi-layer circuit of the common ground.

(5) In the area can be directly hit by ESD, each signal line near a ground.

(6) The I/O circuit should be as close as possible to the corresponding connector.

(7) The circuit that is susceptible to ESD should be placed near the center of the circuit, so that other circuits can provide them with a certain shielding effect.

(8) usually placed in the receiving end of a series of resistors and beads, at the connector or from the receiving circuit 25mm range, to place the filter capacitor. A high-frequency bypass capacitor is placed within the range of 80mm per connector.

(9) Make sure the signal lines are as short as possible. When the length of the signal line is greater than 300mm, be sure to parallel cloth a ground line.

(10) Ensure that the loop area between the signal line and the corresponding loop is as small as possible. For long signal lines, swap the position of the signal and ground lines every few centimeters to reduce the loop area.

(11) Ensure that the loop area between the power supply and ground is as small as possible, placing a high-frequency capacitor near each power pin of the IC chip.

(12) As far as possible to fill the unused area, every 60mm distance to all layers of the fill to connect. Make sure to connect to the ground at two opposite endpoint locations with any large ground fill area (approximately greater than 25x6mm).

(13) When the opening length of the power supply or ground plane exceeds 8mm, a narrow line will be used to connect the two sides of the opening.

(14) The Reset line, interrupt signal line or edge trigger signal line can not be placed near the edge of the PCB.

(15) Connect the mounting holes to the circuit or isolate them. Large pads are used on the top and bottom layers of the mounting holes.

(16) The protected signal line and the unprotected signal line cannot be arranged in parallel.

(17) Pay special attention to the reset, interrupt and control the wiring of the signal line. Use high-frequency filtering, away from the input and output circuitry, away from the board edge;

(18) To pay attention to the magnetic beads, between the pads, may contact the magnetic bead signal line wiring. Some magnetic beads have a very good conductivity and may produce unexpected conductive paths.

3.12 PCB Solder Pad Design

The design of the pads has a great impact on the manufacturability and reliability of SMT products, and is a very important part of PCB design. Good pad design can avoid the problems of false welding, short circuit, vertical monument, shadow effect and so on. IPC provides a surface mount design with a PAD structure standard--ipc-sm-782a,2005 IPC released the IPC-SM-782A replacement standard IPC-7351. Because of the many factors affecting the size of the pad, it must be fully considered to do a good job, should be based on the actual situation to make the PCB pad design specifications for their products, and can not rely entirely on the IPC standard.

The general consideration order of the pad design is: To ensure good electrical performance, reliability, Manufacturability, maintainability. The pad design needs to determine the elements, including the size of the pads themselves, the size of the green oil or solder-resist window, the area of the component, the wiring under the component or the dummy pad used for gluing. As shown in 3.12-1:

The main factors that determine the size of the pad are five: the shape and size of the component, the type and quality of the substrate, the capacity of the assembly equipment, the type and capacity of the process used, and the quality level or standard required. In consideration of the design of the pads must be combined with the above five factors as a whole consideration. When calculating dimensional tolerances, it is more commonly used in the industry to achieve a better balance in all respects by the accepted RMS or RMS method in statistics.

A good pad design should provide easy assembly on the process, easy to inspect and test, as well as a long service life of the solder joints after assembly conditions. Ensure good pad design conditions: (1) to establish a component package data file, (2) to each SMD set up the device packaging size library, (3) to determine the size of the different suppliers of error, (4) to establish the specification of the substrate, (5) to develop in-plant process and equipment capacity specification; (6) Be knowledgeable about the problems and knowledge of each manufacturing process, and (7) Develop quality standards in-plant or on a product

Rectangular chip component Pad design (see figure 3.12-2~3.12-3):

L-pin IC pad design (see figure 3.12-4):

(1) Adaptation range: In Sot, SOIC, (s/t) SOP, (p/s/-c) QFP, such as the package of lead.

(2) Parameter description:
T: Pin thickness (lead thickness) typical value is 0.1~0.15mm
L: Pin Length (lead lengths) typical value is 0.6~0.8mm
LW: Pin widths (lead width)
W: Pad widths (pad width)
L: Pad Lengths (PAD length)
LH: Heel length (lead heel) is usually 0.5mm
LT: pin front Length (lead tip) is typically 0.5mm

(3) Pad size design:
Pad Length: L=lh+l+lt is usually 1.5~1.8mm
Pad Width: w=lw+2mil
lh=lt= = (2.6~5.6) t where θ=15o~30o
J Type pin IC pad design (see figure 3.12-5):

(1) The scope of adaptation: SOJ, PLCC and other parts of the package lead.

(2) Parameter description:
L: Pin lengths (lead length)
B: Pin width (lead widths)
W: Pad widths (pad width)
L: Pad Lengths (PAD length)
LH: Length of heel (lead heel)

(3) Pad size design:
Heel part Length: LH=T/2
Pad Length: l= 2lh+l pad Width: w=lw+ LW
BGA Solder pad Design (see figure 3.12-6):

(1) the diameter of the pad is designed according to the 75%~85% diameter of the solder ball.
(2) the solder plate lead wire does not exceed 50% of the pad, the finer the better, relative to the welding quality.
(3) The power supply pad of the wire is not less than 0.1mm, square can be bold.
(4) In order to prevent the deformation of the pad, welding window (solder mask) is not less than 0.05mm.

Iv. Summary

PCB optimization design in the product development and design process has an important role, each designer should seriously consider, to ensure the optimization of product design, so that the product towards the "no defect" or "zero defect" direction of development.

Article from "Printed circuit information" March 09 Phase II

PCB optimization Design (ii) reprint