For the output frequency of a given carrier power, the phase noise is the power on the bandwidth of the carrier power relative to the given frequency offset (the frequency synthesizer typically defines a 1kHz frequency offset) 1-hz, in units of dbc/[email protected] frequency. The In-band phase noise of the PLL frequency synthesizer is mainly determined by the frequency synthesizer, and the VCO's contribution is very small. The measurement of phase noise requires a spectrum analyzer. Note that the data read out by the General Spectrum analyzer needs to consider the effect of resolving bandwidth. That is, the spectrum Analyzer reading loss of 10log (RBW) is the correct phase noise value. High-end spectrum analyzers can often directly give a single sideband phase noise. phase noise is the measurement of the signal in the frequency domain. In the time domain, which corresponds to clock jitter (jitter), which is the reflection of phase noise in the time domain, large clock jitter in high-speed ADC applications can severely worsen the signal-to-noise ratio of sampled data, especially when the ADC simulates a high frequency of the front-end signal, which requires a low jitter clock. Figure 1 depicts the clock jitter visually.
Figure 1 Phase noise and clock jitter
The clock jitter can be achieved by phase noise integration, as follows: Calculates the phase noise and a at the offset from the given starting frequency offset to the end frequency (typically defined as the output frequency of twice), the unit is dBc, a logarithmic operation for a, and a phase jitter mean square value (RMS phase jitter), The units are in radians, and the radian values are converted to time units, seconds, or picosecond.
Phase Noise "Turn"