PLL and its Modesim simulation

100MHz input clock, PLL layer 40MHz and 200ZHM

Enter the Quartus, set up the project, create a new graphics file, import the PLL module, and set the PLL related parameters.

Complete the creation of the PLL module and generate the PLL.V file

Establish Modesim Project

Package the PLL module

Create motivational text PLL_MODULE_TP

In this way, Modesim working directory In addition to PLL.V, PLL_MODULE.V, PLL_MODULE_TP files, but also add the Alter Emulation library file (if the Modesim software added the Alter Library, which is not required)

To compile

Once the compilation is complete, Simulation-start simulation, check the emulation file (in this case, cancel enable optimization, I don't know why)

Run simulation

PLL and its Modesim simulation