Princeton Structure VS Harvard structure

1. von Neumann structure

The von Neumann structure, also known as the Princeton Architecture, is a memory structure that merges program instruction memory and data memory together. Take the instruction and take the operation number all on the same bus, through the time-sharing multiplexing the way carries on, the disadvantage is at the high speed operation, cannot achieve simultaneously takes the instruction and takes the operation number, thus forms the transmission process bottleneck. Since the program instruction store address and data storage address point to different physical locations of the same memory, the program instructions and data are the same width, such as Intel Corporation's 8086 CPU program instructions and data are 16 bits wide.

There are many CPUs and microcontrollers that use the von Neumann structure at the moment. These include Intel Corporation's 8086 and other Cpu,ti MSP430 processors, ARM's Arm7,mips Company's MIPS processors.

2. Harvard structure

Harvard architecture is a memory structure that separates program instruction storage and data storage, and its main feature is that the program and data are stored in different storage spaces, that is, program memory and data memory are two separate memory, each memory is individually addressed and independently accessed, in order to alleviate the bottleneck when the program runs.

, the Harvard structure of the computer is composed of CPU, program memory and data memory, program memory and data memory using different bus, thus providing a large memory bandwidth, so that the movement and exchange of data more convenient, especially to provide high digital signal processing performance.

Currently using the Harvard structure of the central processing Unit and microcontroller has a lot, in addition to the aforementioned microchip company's PIC series of chips, as well as Motorola's MC68 series, Zilog Company's Z8 series, Atmel's AVR series and the company's ARM9, ARM10 and ARM11.

3. Summary

With the development of CPU design, the increase of pipelining, the mutual exclusion of instruction and data affects the scale of CPU instruction execution. The data memory in the Harvard structure is separate from the program code memory, each having its own data bus and address bus, and taking the operation number and taking the instruction can simultaneously. However, this requires a large number of data lines from the CPU, so the Harvard architecture is seldom used as a CPU external architecture. For the internal CPU, through the use of different data and instruction cache, can effectively improve the efficiency of instruction execution, so now most of the computer system is in the CPU internal use of the Harvard structure, outside the CPU using the von Neumann structure.

Princeton Structure VS Harvard structure