Processor Architecture-from the perspective of server and CISC to x86, arm, and MIPS

1. CISC (Complex Instruction setcomputer, Complex Instruction Set Computer)

The Complex Instruction Set (CISC, Complex Instruction Set Computer) is a microProcessorInstruction SetArchitecture(ISA), each command can perform a number of low-level operations, such as reading, storing, and computing operations from the memory, all in a single command.

• CISC features:

1. The command system is huge, the command functions are complex, and there are many command formats and addressing methods;

2. The vast majority of commands need to be completed in multiple machine cycles;

3. Various commands can access the memory;

4. Adopt microprogram control;

5. There are dedicated registers, a small number;

6. It is difficult to use the optimization compilation technology to generate efficient target code programs;

Among the various commands of the CISC instruction set, about 20% of the commands will be used repeatedly, accounting for 80% of the whole program code. The remaining 80% of commands are not frequently used, and only 20% of the commands are used in programming.

 

2. Balanced CED instruction setcomputer (short Instruction Set Computer)

The design concept of streamlined instruction sets simplifies the number of commands and addressing methods, making it easier to implement. The parallel execution of commands is better, and the compiler is more efficient. It can perform operations at a faster speed.

This design concept was first originated from the discoveryProcessorMany features have been designed to make code writing more convenient. However, these complex features require several instruction cycles and are often not used by running programs. In addition,ProcessorThe speed difference with the primary memory is also growing. Driven by these factors, a series of new technologies have emergedProcessorAnd reduceProcessorThe number of times the memory is accessed.

As a matter of fact, in the later development, the process of competition between the server and CISC learned from each other. The current server also has hundreds of instruction sets, and the running cycle is no longer fixed. Even so, the fundamental principle of the design of the Proteus -- For the streamlinedProcessorOptimization-there is no change, and a parallel VLIW (including Intel Epic ), it is to combine short and uniform short commands to produce ultra-long commands. Each execution of an ultra-long command is equal to parallel execution of multiple short commands.

• Features:

1. Unified Command encoding (for example, the op-code in all commands is always in the same bitwise AND Long Commands), which can be quickly interpreted;

2. Generic latches. All latches can be used for all content and compiler-designed single-purification (but the latches distinguish between integers and floating-point numbers );

3. Simple addressing mode (the complex addressing mode is replaced by a simple computing command sequence );

4. Hardware supports a few data types (for example, some CISC computers have instructions for processing byte strings. This is unlikely to happen on a computer like a computer ).

 

Differences:

CISC (Complex Instruction Set Computer) and RISC (simplified instruction set computer) are two types of CPUArchitecture. They differ in different CPU design concepts and methods. Early CPUs were all CISCArchitectureIt is designed to use the least number of machine language commands to complete the required computing tasks. The design, manufacturing, and micro-architectureProcessorAlthough they are trying to balance the architecture, operation, software and hardware, Compilation Time, and running time among other factors in order to achieve efficient purposes, however, the methods used are different. Therefore, they vary greatly in many aspects, including:

(1) Command System: the design of the command system focuses on frequently-used commands and tries its best to make them simple and efficient. For uncommon functions, commands are often combined. Therefore, it may be less efficient to implement special functions on the server. However, the streamline and superscalar technologies can be used for improvement and compensation. CISC computers have abundant command systems with dedicated commands to complete specific functions. Therefore, it is more efficient to process special tasks.

(2) memory operation: the memory operation is restricted by the memory operation to simplify the control; while the memory operation commands of the CISC machine are many, and the operation is direct.

(3) Program: Generally, the Proteus assembly language program requires a large memory space. When special functions are implemented, the program is complex and difficult to design. However, the CISC assembly language programming is relatively simple, scientific Computing and complex operations are relatively easy to design and efficient.

(4) Interruption: the server can respond to the interruption where an instruction is executed. The server of CISC responds to the interruption after the execution of an instruction is completed.

(5) CPU: The risccpu contains a small number of unit circuits, so the area is small and the power consumption is low. The cisccpu contains a wide range of circuit units, so it has powerful functions, large area, and high power consumption.

(6) design cycle:ProcessorSimple structure, compact layout, short design cycle, and easy to use the latest technology; CISC microProcessorComplex Structure and long design cycle.

(7) user use:ProcessorSimple structure, regular instructions, easy to grasp, easy to learn and use; CISC microProcessorComplex Structure, powerful functions, and easy to implement special functions.

(8) Application Scope: due to the determination of the Proteus command system and the specific application fields, it is more suitable for dedicated machines, while CISC is more suitable for general machines.

 

Ii. x86, arm, MIPSArchitecture

X86, arm, and MIPs are currently the most common and well-knownProcessorArchitecture.

• X86Architecture

X86 or 80x86 is one of the first micro-systems developed and manufactured by Intel.ProcessorThe general name of the architecture. Earlier versions of this seriesProcessorThe name is represented in numbers and ended with "86", including Intel 8086, 80186, 80286, 80386, and 80486.ArchitectureIt is called "x86 ".

X86ArchitectureIntel 1978 central launched in 8086ProcessorThis is the first time that it appears from Intel 8008ProcessorAnd 8008 is developed from Intel 4004. 8086 was selected for ibm pc three years later, and x86 became the standard platform for personal computers and the most successful CPUArchitecture.

8086 is 16 bitsProcessorUntil 1985 of the 32-bit RMB 80386 development, thisArchitectureBoth are 16 bits. Then a seriesProcessor32-bitArchitectureSeveral extensions were introduced until the 2003 amdArchitectureExtended 64-bit and namedAmd64. Later, Intel also introduced the compatibilityProcessorAnd name itIntel 64. The two are collectively referred toX86-64OrX64And created the 64-bit x86 era.

It is worth noting that Intel proposed a cooperation with Hp in the 1990 s for the use of the SeriesProcessorStandalone 64-bitArchitectureArchitectureCalledIA-64.IA-64Is a brand newArchitecture, And x86ArchitectureThere is no similarity at all. (For intel and AMDProcessorTechnology. I want to pick up some typical differences to summarize an article)

X86ArchitectureCISC is an important variable in the instruction length. Memory Access with a word group (4 bytes) length allows non-alignment of memory addresses. Word groups are stored in the memory in the order of low bytes. Backward compatibility is always on x86ArchitectureDevelopment is a driving force behind (design needs determine this factor and often lead to criticism, especially from competitorsProcessorThey are widely regarded as backward-designedArchitecture). HoweverArchitectureMedium, x86ProcessorThe x86 commands will be converted to micro-commands that are more like some of them and then executed, so as to obtain the performance that can be compared with the super-high performance of the RISC, but still maintain forward compatibility.

Today, the PCs in front of us are basically x86ArchitectureComputer. If you want to try otherArchitectureThe first thing to consider is to discard the Windows system. (The good news is that Windows 8 will support both x86 and arm.Architecture)

• ArmArchitecture

ArmArchitecture(Advanced Precision Instruction Set machine (Advanced Short Instruction Set machine), known as ACORN riscmachine earlier) is a 32-bit simplified instruction set)ProcessorArchitectureIt is widely used in many embedded systems. Due to energy-saving features, armProcessorIt is very suitable for the mobile communication field and meets its main design goal of low power consumption.

ArmArchitectureIt includes the following features:

1. Read/StoreArchitecture

2. Orthogonal Instruction Set (any access command can access data in any addressing mode orthogonal Instruction Set)

3. A large number of 16*32-bit register arrays (register file)

4. Fixed Length of 32 bits operation code (opcode) to reduce the cost of coding and reduce the burden of decoding and pipeline.

5. Most of them are executed in one CPU cycle.

In order to reinforce this simple design method, compared withProcessorFor example, Intel 80286 and vodla68020 have added some special designs:

1. Most of the commands can be executed in a conditional manner, reducing the load generated during the branch and making up for the shortage of the branch predictor.

2. The arithmetic command will only change the conditional code when required)

Barrelshifter can be used to execute most arithmetic commands and addressing computing without compromising performance.

4. Powerful index addressing mode)

5. A streamlined but fast dual-priority interrupt sub-system with a temporary memory group that can be switched

Today, the arm family occupies all 32-bit embeddedProcessor75%, making it the most 32-bit dollar in the worldArchitecture. ArmProcessorFrom portable devices (PDAs, mobile phones, multimedia players, handheld video games, and computers) to computer peripheral devices (hard disks and desktop routers) it even exists in missile-carrying computers and other military facilities.

For smart machine enthusiasts, armProcessorYou must have heard of it.

• MIPsArchitecture

MIPsArchitecture(English: mipsarchitecture, which is "micro-level with no internal locksProcessorMicroprocessorwithout interlocked pipeline stages, which is also a language related to millionsof instructions per second), is a kind of short instruction set (RISC)ProcessorArchitectureIn 1981, it was developed and authorized by MIPS technology and widely used in many electronic products, network devices, personal entertainment devices and commercial devices. The Mechanism is to use software methods to avoid data-related issues in the pipeline. It was first developed by a research group led by Professor Hennessy at Stanford in the early 1980s S. The R series developed by MIPs is the micromodule of some of the commercial products developed on this basis.Processor. These products make up various workstations and computer systems for many computer companies.

MIPs is the earliest commercial server.ArchitectureChip. MIPs's system structure and design concepts are advanced, emphasizing software and hardware collaboration to improve performance, while simplifying hardware design.

In 2002, the Institute of Computing Technology of the Chinese Emy of Sciences began to develop dragon CoreProcessor, Using MIPSArchitectureBut has been accused of infringement without authorization from MIPs. In 2007, the Chinese Emy of Sciences reached a settlement with MIPS and was officially authorized. China's dragon Core 2 and the previous generation use 64-bit MIPS commands.Architecture. Past, MIPSArchitectureMost of the products are found in the workstation field. The "emotion engine" used by Sony PS2 game machines also uses MIPS commands.ProcessorThe performance is very strong, and godson 2 also belongs to this camp, fully compatible with the above products in terms of software.

 

 

 

In addition:

• Comparison between ARM and MIPS:

The most commercially available armArchitectureCompared with MIPS, MIPS has the following advantages:

1. MIPS supports 64-bit commands and operations. Currently, arm is only 32-bit

2. MIPS has a special splitter that can execute division commands.

3. The core registers of MIPs are twice as many as those of arm, so the power consumption of MIPs is lower than that of arm in the same performance, and the performance is higher than arm in the same power consumption.

4. MIPS commands are a little more flexible than arm commands.

5. Some people think that the bank register performance of MIPs is better than that of arm, but I have never seen any tests that can be reflected.

The above is the MIPs comparison armArchitectureNext, let's take a look at MIPS.ArchitectureLimitations,

And armArchitectureMIPsArchitectureThe following problems also exist:

1. There is a problem with the starting point of the MIPs memory address, which leads to limits on the memory and cache support of MIPS.ProcessorSingle Kernel has problems with high-capacity memory

2. The future direction of MIPs is parallel threads, similar to Intel's hyper-threading. Arm's future direction is physical multi-core. At present, it seems that physical multi-core is dominant. From this point of view, the development of China's dragon core to multi-core is still far-sighted.

3. Although the MIPs structure is simpler, it is still a single launch in sequence. Arm has evolved into a disordered dual-launch, and even NV Denver is already a trigger in disorder.

In terms of business, the two are also very different. Arm is very expensive and cannot change the kernel at will. MIPs is much more open. (This is also why godson does not use arm.Architecture.)

 

 

• Comparison between ARM and x86:

The x86 Instruction Set has the following highlights:

General Register group-the impact on the CPU kernel structure the x86 Instruction Set has only eight General registers. Therefore, the CPU execution of CISC is to access data in the memory most of the time, rather than in the register. This slows down the entire system.

Some general-purpose registers are often used in the Proteus system, and the overlapping register window and register heap are used to make full use of register resources.

Decoding-influence on the external core of the CPU

Decoder, which is only available for x86cpu. The function is to convert an indefinite x86 command to a fixed-length Command similar to a RISC command and hand it over to the Proteus kernel. Decoding can be divided into hardware decoding and micro-decoding. For simple x86 commands, only hardware decoding is required, and the speed is fast. For complex x86 commands, micro-decoding is required, and divides it into several simple commands, which are slow and complex.

Small addressing range-constraints on user needs

Features of the arm instruction set:

1. Small size, low power consumption, low cost, high performance;
2. Supports the thumb (16-bit)/ARM (32-bit) Dual-instruction sets and is compatible with 8-bit/16-bit devices;
3. A large number of registers are used to accelerate instruction execution;
4. Most data operations are completed in registers;
5. The addressing method is flexible and simple, and the execution efficiency is high;
6. Fixed instruction length;
7. Pipeline Processing Method
8. Load_store structure: All calculations must be completed in the register in the Server Load balancer instance. The communication between registers and memory is completed by separate commands. In CSIC, the CPU can directly perform memory operations.

Some instruction about arm's non-RISC IdeologyArchitecture:

1. Allows variable execution cycles for certain commands to reduce power consumption, area and code size.
2. Added a bucket-type location device to expand some commands.
3. The 16-bit thumb instruction set is used to increase the code density.
4. Use conditional execution commands to improve code density and performance.
5. Use enhanced commands to process data signals.

Summary:

X86 adopts CISC, which features a large number of complicated commands, variable instruction lengths, and multiple addressing methods. These are also the disadvantages of CISC, because they greatly increase the difficulty of decoding, however, with the current high-speed hardware development, the speed improvement caused by complex commands is far less than a waste of time on decoding. In addition to the x86 instruction sets used in the personal PC market, CISC is no longer needed for servers and larger systems. The reason why x86 still exists is to be compatible with a large number of software on the X86 platform. At the same time, the implementation of its architecture composition is not very difficult.

The biggest feature of arm's RISC system is that the instruction length is fixed, the Instruction format is small, and the addressing mode is small. Most of the commands are simple and can be completed within a clock period, it is easy to design the excessive amount and pipeline, the number of registers is large, and a large number of operations are carried out between registers, so there is a fast operation speed. Therefore, armProcessorIs currently the most popularProcessorIs one of several mainstream embedded processing systems.

 

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From http://www.verydemo.com/demo_c269_i966.html

Processor Architecture-from the perspective of server and CISC to x86, arm, and MIPS