page, page table

Page and Page table 1 page Paging Storage Management is the division of a job's logical address into a series of equal-sized parts, called pages. Each page is numbered, and the number of pages for each job starts at 0. Similarly, the available physical memory is also divided into contiguous parts of the same size, called blocks or page boxes. Also label the blocks, starting with the 0#. When allocating memory space for a process, in pages, each block in memory holds one page of user jobs.     As long as there are enough blocks in memory, the blocks can be contiguous or nonadjacent, and the entire job can be stored. The size of the page is important for memory utilization and overhead, the page is too large, and the last page of the job will inevitably have a large amount of unused space-inside fragments. The page is too small, although the size of the inner fragment can be reduced, but too many pages of a job will make the job page table too long to occupy memory, while the system frequently page conversion, aggravating the system overhead. Therefore, the size of the page should be moderate, usually the page size of the 512b-8kb,windows system is 4KB.
2 The address structure in the address structure paging system consists of two parts, the page number and the in-page offset. can be interpreted as a two-tuple (p,w), where P is the page number, W is the offset in page p, or the position relative to page P begins. The address length in the following figure (a) is 32 bits, where 0-9 bits is the in-page offset, and the size of each page is 2 for 10 Parties = 1k;10-31 is the page number, and 2 of the total 22 square = 4M page. In figure (b), the address length is also 32-bit, where the 0-11-bit page offset, the size of each page is 2 12 square = 4k;12-31 bit is the page number, a total of 2 20 square = 1M page, so different system page size is not the same.
(a) page size 1KB (2 of 10 Parties)


(b) the page size is 4KB (2 of 12) The address structure is certain for a particular machine. Given the logical address A, the page size is L, the page number p and the offset in the page are P = INT [a/l] w = [A]modl] For example: The system's page size thing 1K, set A = 3096, then the upper formula is P =3,w = 24.

3 page table in paging storage management, pages can be stored consecutively or discontinuous, which increases the difficulty of logical address-to-physical address translation. How to find the physical block corresponding to the page in memory is the key to address reload. To do this, the system creates a page table for each process. In the process logical address space, each page, in turn, has a table entry in the page table that records the physical block number of the page. As shown in the figure below

After you have configured the page table, you can easily find the location of the page in memory by looking up the page table.     The page table has a logical address-to-physical address mapping effect. For page protection, an access control field is usually set. When this field occupies one, it is used to specify whether the contents of the page are allowed to be written or read, and if the Access control field is two bits, it can indicate that the access control is read-write, read-only, and run only three kinds. When the process writes a read-only page, the system interrupts to make an error.
Two-address transformation structure in order to realize the transformation of the paging management logical address to the physical address, the address transformation mechanism must be set up in the system to implement the address mapping. Because the size of the page and the size of the block are the same, when a page of the process is put into memory, the page offset of the page and the intra-block offsets are consistent, so the address translation does not have to consider the offset, only the logical page number and the actual physical number of the corresponding can be considered. The page table contains the page number and its corresponding physical block number, so the address transformation will be done with the help of the page table.
1 The first step of the basic Address Transformation address transformation is to retrieve the page table. In order to achieve a quick retrieval of the page table, it is best to put the page table in the Register, each table item with a register. However, there is a problem, usually not many registers in the computer, and the page table may be very large, modern computer virtual address is at least 32 bits, for example, the size of the page is 4KB, then 32-bit address space will have 1M pages, 64-bit address space more. 1M pages in a virtual space require 1M of table entries. Also, each process has its own page table. Therefore, page tables are usually stored in memory. Only one page table register is set in the system, which holds the start Address and page table length of the page table.     When the process is not executed, the start address of the page table and the length of the page table are placed on the PCB, and when the process runs, the two data are loaded into the page table register. When a process wants to access data in an address, the address transformation mechanism will first automatically convert the address into a page number and offset within the page, and then retrieve the page table based on the page number. To determine whether the page number is greater than or equal to the page table length before retrieving, if the page number is greater than or equal to the page table length, the description exceeds the valid address range, resulting in an error interrupt. Otherwise, the result of multiplying the page number and the page table item length together with the beginning address of the page table, the address of the page table item in the page table is obtained, the corresponding physical block number is found, the physical block number is loaded into the physical address register, and the offset of the page is fed into the intra-block offset of the physical address register. This results in a real physical address.
Since the page table is placed in memory, a data access requires two accesses to the memory, the first access to the page table, the corresponding physical number, and then the offset stitching to form a physical address, the second time from the physical address structure obtained from the first access to data. The operating speed of the system is generally limited by the rate at which the CPU obtains instructions and data from memory, and two accesses of memory at a time can reduce the processing speed of the computer by 50%.     How to solve this problem effectively. The workaround is to add a special high-speed buffer register with parallel lookup capability in the address transformation structure, which is called the conversion detection buffer, also known as the Fast table, for storing the page table entries that are currently visited. At this point, when a valid address is given, the address transformation mechanism first compares the page number p with all the table entries in the TLB to determine if the table is in it, and if a matching page is found, the page table entry is taken directly to get the physical block number without having to pass through the page table. If the address transformation mechanism does not have a matching item, the normal page table query is performed. First eliminate a table entry from the TLB and replace it with the newly found page table entry.     This way, if the page is accessed again soon, the second time will naturally hit. Because of the price of the register, the structure of the fast table can not be very large, usually able to store 16-512 page table items, which for small and medium-sized jobs, it is possible to put all the page table into the fast table, for large jobs, you can put common page table items into it. Due to the local principle of the program, the introduction of the fast table greatly improves the efficiency of the system, and the data shows that the probability of finding the page table item from the Fast table can reach 90%. This reduces the overhead of the system by significantly reducing the number of accesses to the page table.
2 Multi-level page table modern computers have very large logical address spaces, taking 32-bit computers for example, assuming that the page size is 4KB, then a page of a job can reach a maximum of 2 20 parties, which means that the job's page behaves 2 of the time. Assuming that a page behaves in one byte, the page table has a size of 2 of 20 square B, which requires 1MB of memory space. And the 1MB memory space of the requesting person is continuous.     This is obviously unrealistic, the best way to solve this problem is to look at the page table page as a normal file, it is distributed, that is, page table re-page, resulting in the idea of multi-level page table. In the case of the two-level page table, the page table is separated into different physical blocks, so that the page table of these discrete pages is created, that is, the Level two page table. In the following illustration, the 32-bit virtual address is divided into 10-bit outer page table fields, 10-bit Internal page table fields, and 12-bit intra-page offsets.

The 32-bit logical address space is mapped to 32-bit physical address space using a two-level page table, with each page size of 4KB. The beginning physical address of the first-level page table is stored in the page table base register, and the first-level address map is indexed using the highest 10 bits of the logical address and produces the physical address of the second-level page table. The following 10 bits are used to index the second-level page table, resulting in a combination of the address of the physical page and the minimum 12 bits of the logical address to generate the physical address. If there is no actual mapping in a Level two page table, it can be deleted and marked as unavailable in the top-level page table.     Many paging schemes are constructed so that the size of the page tables and the size of the pages are consistent so that the space they occupy can be used with the same allocation scheme as the memory pages used by the process.     For a 32-bit machine, it is appropriate to use a two-level page table, but for a 64-bit machine, it is inappropriate to use a two-level page table, so a multilevel page table must be used.        The method of paging storage management can solve the problem that the program and data need not the continuous storage space, but this kind of memory management still requires the whole job to be loaded into memory running, neither solves the problem of small memory of big job, moreover, this kind of management method is purely from the storage angle, and does not take into account the storage problem of the program itself. Summary: When a single page, because the page table entries are continuous (corresponding to the physical address space), it is not advisable to occupy a whole block of contiguous address space, so the use of multi-page table (mainly two-level page table), but the entire logical block is scattered.

Basic segmented allocation      paging storage tubes can improve memory utilization, but the purely physical solution of paging, a logical segment is dispersed in many physical blocks. Many times, programmers want to put a program in memory in accordance with its logical structure.      the logical segment of a program changes in size when the program is running, such as data segments and stacks, while the size of some logical segments does not change during operation, such as code snippets. In the way of paging storage management, it is very difficult for storage management of dynamically growing segments, and once the growth of the break involves reallocating the physical blocks, then it involves the modification of the page table and so on.      a program with n procedures, in the paging storage management, the process is one by one tightly together, there is no gap between, the result is to modify the size of a process will affect the start address of other processes, In turn, you need to modify all processes that call the moved process so that their access points to the new address of the process. In a program with hundreds of procedures, the overhead of this operation is quite large.     in paging storage management, a logical segment may be stored in n physical blocks, and if several programs share this logical segment, you need to add n items to the page table of each program earlier in order to implement address translation. This will inevitably increase the size of the page table, thus increasing the cost of the system, the protection of the logical page is the same reason.     a very common approach to these issues is to provide a single program with several separate address spaces called segments. Each segment consists of a sequence of linear addresses from 0 to the largest. The length of each segment can be a value between 0 and one of the allowed maximum values. The lengths of different segments can vary and are usually different. The length of the segment can be changed during run time, and the length of the stack segment will grow when the data is pressed in. Decreases when the data is ejected.     because each segment is a separate space, they can grow or decrease independently without affecting other segments. A segment is a logical entity, a segment may consist of a procedure, an array, a stack, a set of numeric variables, but generally it does not contain many different types of content at the same time. The segmented allocation method realizes the expansion of segment length, the dynamic link of segments and the protection and sharing of segments are easier to implement than the page-type storage.    1 Segment Table      in segmented storage management, the logical address structure is two-dimensional, that is, the segment number and the intra-segment offset. As shown in the following figure. In this address structure, a job is allowed to have a maximum of 64K segments, with a max length of 64KB for each segment.                  in segmented allocation mode, the system allocates a contiguous partition for each segment, Each segment in the process can be loaded into different partitions in memory in a discrete way. In order to convert the logical address to the physical address, a segment table is created for each process in the system. Each segment occupies a table entry in the paragraph table, which records the address of the beginning address and segment of the segment, as shown in the figure, the segment table can be stored in a set of registers, which helps to improve the speed of address translation, but more commonly in memory. After the Cong is configured, the executing process can find the memory area for each segment by finding the segment table.           
2 uses segments of varying sizes, and the logical and physical addresses are no longer simple correspondence. Consider the address of a n+m bit, the left n bit is the segment number, and the right m bit is the address within the paragraph. When the process enters a running state, its segment table address is loaded into the Segment table register.