TTL and CMOS levels

1, TTL level:
The output level is greater than 2.4 V, and the output level is less than 0.4 V. At room temperature, the output high level is generally 3.5 V, and the output low level is 0.2 V. Minimum input height and low level: Input height> = 2.0 V, input low level <= 0.8 V, and noise tolerance is 0.4 V.
2, CMOS level:
1 logic level voltage is close to the power supply voltage, 0 logic level is close to 0 V. It also has a wide noise margin.
3. Level conversion circuit:
Because TTL and coms have different high and low levels (TTL 5 V <=> CMOS 3.3 V), the level conversion is required when the two resistors are used for level partial pressure, there is nothing advanced. Haha
4, OC door, that is, open collector door circuit, OD door, that is, drain pole open door circuit, must be the external pull resistance and power supply in order to switch level as high and low level. Otherwise, it is generally used as the switch for large voltage and large current load, so it is also called the drive door circuit.
5. Comparison of TTL and COMS circuits:
1) the TTL circuit is the current controller, while the COMs circuit is the voltage controller.
2) the TTL circuit is fast, and the transmission delay is short (5-10ns), but the power consumption is high. The speed of the COMs circuit is slow, and the transmission delay is long (25-50ns), but the power consumption is low. The power consumption of the COMs circuit is related to the pulse frequency of the input signal. The higher the frequency, the hotter the chip set.
3) coms circuit locking effect:
Because the input current of the COMs circuit is too large, the internal current increases sharply. The current keeps increasing unless the power supply is cut off. This effect is the locking effect. When the lock effect occurs, the internal current of COMS can reach more than 40mA, And the chip is easily burned out.
Defense measures: 1) Add a clamp circuit at the input and output ends so that the input and output cannot exceed the specified voltage.
2) The power input of the chip is coupled with a decoupling circuit to prevent high voltage at an instant on the VDD end.
3) adds a line resistance between the VDD and the external power supply, and does not let it in even if there is a large current.
4) when the system is powered separately by several power supplies, the switch should be enabled in the following order: when the power supply is enabled, the COMs circuit is enabled first, and then the power supply of the input signal and load is enabled; when the power supply is disabled, first turn off the power of the input signal and load, and then turn off the power of the COMs circuit.
6. Precautions for using the COMs Circuit
1) when the COMs circuit is used, the voltage controller has a high total input resistance and is capable of capturing interference signals. Therefore, do not leave unused pins empty. connect them to the pull resistance or drop-down resistance to give them a constant level.
2) When the input end is connected to a low internal signal source, a throttling resistor must be connected between the input end and the signal source so that the input current is limited to 1mA.
3) when the signal transmission line is connected to the COMs circuit, the resistance is matched.
4) when the input end is connected to a large capacitor, the resistance should be indirectly protected at the input end and the capacitor. The resistance value is r = V0/1mA. v0 is the voltage on the external capacitor.
5) if the input current of COMS exceeds 1mA, coms may be burned out.
7. Load Characteristics at the input end of the TTL door circuit (Handling of special cases with resistance at the input end ):
1) when it is suspended, it is equivalent to when the input end is connected to a high level. It can be seen that the input end is connected to an infinite resistance.
2) input a low level after a 10 k resistor is connected at the input end of the door circuit. The input end shows a high level rather than a low level. According to the load characteristics at the input end of the TTL door circuit, the low-level signal input by the TTL door circuit can be identified only when the series resistance connected to the input end is less than 910 euros, if the series resistance is large, the input end will always be high. Pay attention to this. The COMS door circuit does not need to consider this.
8. The TTL circuit has an open-collector OC gate, and the mos tube also has an open-drain OD gate corresponding to the Collector. Its output is called an open-drain output. The OC door has a leakage current output at the end, that is, the leakage current. Why is there a leakage current? That is because when the end of the three-host tube, its base current is about equal to 0, but it is not really 0. The current of the collector passing through the transistor is not really 0, but about 0. This is the leakage current. Open/leak output: the output of the OC gate is the open/leak output, and the output of the OD gate is also the open/leak output. It can absorb a large amount of current, but cannot output the current outward. Therefore, in order to be able to input and output current, it must be used together with the power supply and the pull-up resistor. The OD gate is generally used as an output buffer/driver, a level converter, and can meet the needs of absorbing large load current.
9. What is the Tumen pillar? What is the difference between it and the open-leakage Road?
In the TTL integrated circuit, the output with a pulling transistor is called the tengzhu output, but not the OC gate. Because TTL is a third-level off, the chart column is connected by two third-level tubes. So pushing and pulling is a totem. General Graphic Output, high 400ua, low 8ma

From: http://blog.21ic.com/more.asp? Name = yzy1102 & id = 7688