NextArticleIn this article, we will talk about menory alignment-memory alignment.
I. Why do I need memory alignment?
No matter what I do, I habitually ask myself: Why am I going to do this? Yes, this may also be a question that everyone will think about,
Because we cannot be confused or. Why do we need memory alignment? This starts with the memory access mechanism of the CPU.
To understand the CPU memory access mechanism, I searched for information all night yesterday, but I still couldn't find a good introduction. Later I found the relevant information.
. Most of these blogs aim to introduce memory alignment, and then talk about the memory access mechanism of the CPU.
I couldn't find any authoritative information. I heard that <assembly language programming art> This book contains an introduction to the x86 system. I downloaded a PDF file,
Still not found.
Therefore, many of the following aspects about x86 memory access come from some good blogs. At the end of the article, I will indicate references.
Blog link for extended reading.
A Brief Introduction to the memory access mechanism of x86:
1. Memory write operation: the CPU puts the address to be written into the address bus, the data to be written into the data bus, and the control bus is set to write operation.
Then, the memory subsystem selects the memory unit based on the address bus and checks the control bus to find that the operation is a write operation. Then, the data in the data bus is imported and written to the relevant memory.
Unit.
2. Memory reading operation: the CPU puts the address to be read into the address bus, and sets the control bus as the read operation. The memory subsystem selects the memory according to the address bus.
Unit. Check the control bus and find that the read operation reads data from the memory unit and writes data to the data bus.
16-Bit Data Bus: each memory cycle, the CPU can only read one even unit and one odd unit, the address of the address bus is the address of the even unit, so the address of the address bus is always 2 aligned.
Each memory cycle can read a word, that is, 16bit.
1. Read a word. If the word is 2-aligned, only one memory cycle is required. If the data is not 2-aligned, two memory cycles are required.
2. Read dual-word: if the data is in 2 alignment, it takes only two memory cycles to complete. If the data is not in 2 alignment, three memory cycles are required.
32bit Data Bus: The data addresses read in each memory cycle are 4-aligned. One memory cycle can read one double word, that is, 32bit.
1. if the address is 4-aligned when reading a double word, it only takes one memory cycle to complete. if the address is not 4-aligned, two memory cycles are required.
2. if you read a word and the address is 4 modulo 3, then you need to read the data in two memory cycles. if the address has no more than 3 for 4 modulo
Only one memory cycle is required to read data.
3. For bytes, read from any byte address only requires one memory cycle.
We can see from the above that the 16-bit data bus CPU is 2 aligned, while the 32-bit data bus CPU is 4 aligned. The main reason is that it can be minimized.
Address Access is completed within the memory cycle to improve CPU efficiency.
Ii. Memory alignment
If the memory alignment mechanism is not used, some address access needs to be completed within multiple memory cycles, and the high and low bytes read in multiple memory cycles are also required.
And then get the 32bit data. If the memory alignment mechanism is used, it not only reduces the memory cycle required during address access, but also avoids
High/low bytes of data are pieced together to improve the CPU efficiency.
3. How does the compiler handle memory alignment?
Struct mem_alignment {char a; int B; char C ;};
The size of the 32-bit x86 machine is 12. Another problem is that if the order of the member variables in the struct is different, the length of the structure in the memory will be
They are also different, just like the above, if changed to the following:
Struct mem_alignment {char a; char C; int B ;};
Then its size becomes 8.
If we use a compact alignment of _ attribute _ (packed) or _ attribute _ (aligned (1,
So the size of struct mem_alignment should be 6. Or use a pseudo command # pragma pack (1 ).
# Pragma pack (1) struct mem_alignment {char a; char C; int B ;}#pragma pack ()
The last sentence serves to restore the default alignment of the compiler.
The knowledge about memory alignment is summarized here. It is also an explanation of the previous Article ~
References:
<Memory alignment from the 80x86 structure> http://my.unix-center.net /~ Simon_fu /? P = 262
<Oschina memory alignment problem> http://www.oschina.net/question/234345_48055
<Thinking in Linux C/C ++ byte alignment details> http://www.linuxsong.org/2010/09/c-byte-alignment/