Go GDT and Ldt

Website: http://blog.csdn.net/billpig/article/details/5833980

The segment register in protected mode is composed of a 16-bit selector and a 64-bit segment Descriptor Register
Segment Descriptor Register: Bucket Descriptor
Selector: The index of the bucket descriptor

PS: The original real mode of each segment register as a protected mode segment selector, 80486 has 6 (that is, cs,ss,ds,es,fs,gs) 80-bit segment register, while providing 6 segments around the machine currently running the address space. The segment represented by the selector CS is still a code snippet, and the segment represented by the selector SS is still a stack segment

(1) Global Descriptor List GDT (Global descriptor Table) in the whole system, there is only one (one processor for a GDT) in the overall descriptor, the GDT can be placed anywhere in memory, but the CPU must know the entrance of the GDT, That is, where the base site is located, the Intel Designer door provides a register GDTR to hold the entry address of the GDT, the programmer will set the GDT to a location in memory, you can use the LGDT command to load the GDT's entry address into this repository, from now on, The CPU accesses the GDT based on the contents of this register as the entrance to the GDT. The GDTR store is the base address of the GDT in memory and its table length bounds.

(2) Segment selector (Selector) access to the global descriptor by GDTR is done through the "segment selector" (the segment register in real mode), three ① steps. Segment selector is a 16-bit register (same as segment register in real mode) four

Segment selectors include three parts: Descriptor index, TI, request privilege level (RPL). His index (descriptor index) section represents the position of the desired segment descriptor at the descriptor descriptor, and the corresponding descriptor (three ① steps) can be found by this location based on the descriptor map base that is stored in the GDTR. Then use the segment base in the descriptor table with the logical address (Sel:offset) OFFSET can be converted to a linear address (three ② steps), the segment selection of the TI value is only one 0 or 1, 0 means that the selection is in the GDT selection, 1 means that the selection is in the LDT selection. The request privilege level (RPL) represents the privileged level of the selected child, with a total of 4 privileged levels (level 0, 1, 2, 3).

Description of the privilege level: each segment in a task has a specific level. Whenever a program attempts to access a segment, it compares the privilege level owned by the program with the privilege level to be accessed to determine whether the segment can be accessed. The system convention is that the CPU can only access segments of the same privileged level or lower privileged level.

For example, give the logical address: 21h:12345678h converted to a linear address
A. Select Sub sel=21h=0000000000100 0 01b He means: Select sub-index=4 that is 100b to select the 4th descriptor in the GDT; the ti=0 represents the selection of the GDT, and the 01b on the left represents the privileged level rpl=1
B. offset=12345678h if the segment base (base) described in the fourth descriptor of the GDT is 11111111h, then the linear address =11111111h+12345678h=23456789h

(3) Local Descriptor Table LDT (local descriptor table) Local descriptor tables can have a number of sheets, each task can have one. We can understand that GDT and LDT:GDT are first class descriptor tables, and the LDT is a level two descriptor table.

The LDT and GDT are essentially the same, but the LDT is nested within the GDT. The LDTR records the starting position of the local descriptor descriptor, and the content that differs from the GDTR LDTR is a segment selector. Since the LDT itself is also a piece of memory, is also a segment, so it also has a descriptor to describe it, the descriptor is stored in the GDT, corresponding to the descriptor will also have a selector, LDTR loaded is such a selector. LDTR can be changed at any time in the program by using the LLDT directive. For example, if the load is selector 2 then LDTR points to the table LDT2. For example, if we want to select the address 12345678h of the segment described in the third Descriptor in table LDT2.
1. First you need to load the LDTR to point it to LDT2 using instructions Lldt load Select2 to LDTR
2. The index=3 representative of the SEL selects the third descriptor when the logical address (sel:offset) is accessed, and the Ti=1 represents the selection in the LDT, when ldtr points to LDT2, so it is selected in LDT2, at which time the SEL value is 1Ch (binary 11 1 00b). offset=12345678h. Logical address is 1c:12345678h
3. A descriptor is selected by the SEL, and a linear address can be obtained by adding offset from the base address (base) in the descriptor, for example, if the base address is 11111111h, then the linear =11111111h+12345678h=23456789h
4. At this point, if you want to access the third descriptor in LDT1, just use the Lldt instruction will select sub-selector 1 load and then execute 2, 32 steps (because at this point LDTR also point to LDT1)
Since each process has its own set of program segments, data segments, stack segments, with a local descriptor, the program segments, data segments, and stack segments of each process can be encapsulated together, and the segments of different processes can be accessed as long as the LDTR is changed.

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Segment Descriptor :

The p,present bit, 1 means that the described segment exists (valid), 0 indicates that the segment described is invalid, and using the descriptor causes an exception
Dpl,descriptor privilege, descriptor privilege level, description of the privileged level of the described segment
DT, descriptor type bit, 1 description The current descriptor is a bucket descriptor, and 0 is a system descriptor or a door descriptor.

TYPE:
bit 0:a (accessed) bit, indicating whether the descriptor has been accessed, when the selector is loaded into the segment register, the bit is marked as 1
bit 3:e (executable?) Bits, 0 Description The segment described is a data segment; 1 is an executable segment (code snippet)

when you are a data segment,
bit 1 is w bit, indicating whether the data segment is writable (0 read-only, 1 writable)
bit 2 is the ED bit, indicating the extended direction of the segment (0 to High, 1 to low)
when an executable segment is,
bit 1 is r bit, indicating whether the execution segment is readable (0 only, 1 readable)
bit 2 is a C-bit, 0 indicates that the segment is not a consistent code segment (normal code snippet), 1 is a consistent code segment

G is the granularity bit, 0 indicates that the limit granularity is byte and 1 is 4K bytes.

D-bit:
1. In the executable segment, D is 1, which means that 32-bit address, 32/8-bit operand, 0-bit address, 16-bit operand are used
2. Segment Descriptor (stack segment?) addressed by SS , d for 1 means that an implicit operation (such as Push/pop) uses ESP as a stack pointer,/
use SP for 0 (Implied action: Segment attribute type not explicitly defined use16/use32?66h,67h?)
3. In the storage segment to the low expansion, D is 1, which indicates that the upper limit of the segment is 4G; The 0 upper limit is 64K

the structure representation of the bucket descriptor:

Segmented management can convert virtual addresses to linear addresses, while paging management can further translate linear addresses into physical addresses. When the PG position in CR0 is 1 o'clock, the paging management function is started, which disables the paging management function and uses the linear address as the physical address.

Virtual address to Linear address:

Linear address = Subgrade Point + offset address

32-bit linear address to physical address:
32 bits are divided into:
Page Catalog index: Up to 10 bits indicating page table descriptors
Page Table index: 12-bit to 21-bit, also 10-bit. Indicates the page descriptor in this page table
Page Descriptor: The low 12 bits of the linear address is the in-page offset.

Go GDT and Ldt