Hardware I²c of nRF52832

Source: Internet
Author: User
Tags ack

These days have been tossing nRF52832 hardware i²c, to today finally appeared the results, in this also confirmed that sentence: "The cultivation of the harvest"

52832 Hardware I²c Although the official provided the demo, but their understanding of the i²c communication is not deep enough, another 52832 of the code is also encapsulated too deep, but the interface function does not have a clear explanation (also can be said that my English is too slag, others wrote but I did not read it ...) ), which makes it difficult for the first contact with NRF products

According to my development process, or first explain some of the relevant knowledge of i²c, because I was the first tuning hardware i²c engaged in a half-day, and then the development of analog i²c, the success of the simulation to debug hardware Twi (that is, 52832 hardware i²c, the full name is estimated to be a wire Interface

I²c communication requires two lines: SDA,SCL. I²C communication devices have two roles: Master and slave, the general User development program is to develop the master side, and then read the writing as slave peripherals, such as: Eeprom,flash,sensor,display device.

In the communication process, there are two sets of special control signals:
When the START:SCL is high, the SDA changes from high to low.
When the STOP:SCL is high, the SDA changes from low level to high level.

(Note that in the communication process, the SCL is always controlled by master, which makes sense when you do a simulation.)

When master writes data operations, the SCL and SDA are both idle (both are high), then SDA is high to low (start signal), low SCL pull low, this time SDA can become the desired level, high level stands for bit 1, low level for bit is 0 , the level is stable after the high clock (the purpose is to let the slave read the data, the SCL is high, SDA to remain unchanged, slave read the level of SDA); After the data is finished: Pull the high SCL, then pull the high SDA, then pull down SDA, a complete stop signal is complete.

Read the data operation, start and stop these timing, but the host to parse the data from the Slave (level signal), pull down the SCL, and then release the SDA (that is, pull high SDA), a delay after the high SCL to read the SDA level signal (since it is read level, It is necessary to set the input pin), if it is high, write down is a h_bit, otherwise it is l_bit, after reading to 8 bits of data if you want to continue to read the reply Ack, otherwise reply Nck.
The ACK signal is the SCL pulled low after giving SDA a low level and then pulling the high SCL;
The Ank signal is the SCL pull low and give SDA a high level, then pull the high SCL;

Below to explain the overall operation of the master and slave transmissions:
Master writes data to Slave, and generally slave writes data to a certain register address, that is, where you want to transmit data to this peripheral
In EEPROM, for example, the first to send the device address 0xAE (8-bit data, high 7 bits is the address, LSB is the direction of data transmission: 0;0 representative Write, 1 for reading, can be as out,in to understand so easy to remember);
Then send the register address, and then send the data;
The timing can be
Send_data each byte, the slave responds to a "CK signal" and if it is ack the data is sent successfully, otherwise it fails.
Because it is a continuous write data, so the middle can not stop,start

Read the data operation, write a register address first, and then pass a read command

Re_start before sending Slave_address_read, same as Start signal
Receive_data is to receive data, this time to identify the SDA level and parse the data, make an ACK response, the last byte received the reply Nck signal;

The following is a description of nRF52832 's hardware i²c code problem

The API interface that NRF leaves is

ret_code_t app_twi_perform(app_twi_t *  \              p_app_twi,app_twi_transfer_t const * p_transfers,uint8_t         number_of_transfers,void (* user_function)(void))

This function calls the App_twi_schedule function to import to the queue

ret_code_t app_twi_schedule(app_twi_t *                   p_app_twi,                            const * p_transaction)

If you want to call the App_twi_perform function, prepare the parameters.
1, P_app_twi, this is in the TWI transmission queue to apply for a location
The English words are creating an instance of the TWI transaction manager.
2, P_transfers, which is an array containing the array blocks to be transferred
3, Number_of_transfers, this is the number of data blocks you transmit
4, User_function, a user's callback function pointer, the data block has passed the API will call this User_function

Explanation: The above-mentioned data block means a complete i²c operation needs to use the information: contains the slave address, the direction of data transmission (read or write), the transmission of data data_buffer, length of data, There is no end sign (meaning if the group has finished communicating after the data has been transferred)

Inside the Official SDK directory
Open Project in Examples\peripheral\twi_master_using_app_twi

First initialize the TWI

Data transmission

What is transferred

Note that at24c02_init_transfers is a global variable array
That is, its address is in the heap, not automatically released, because the address of this array may be called multiple times, and placed in a function will cause the difference in the address caused by error
There's an explanation inside the demo

  //"static"on stack    //  isand these structures most likely    //  thisfunction returns]      const transfers[] =    {         AT24C02_READ(&AT24C02_first_page_addr,AT_buffer,5)    };

Note that the At_write_number array here can be interpreted as a data buffer, which can be changed by changing the contents of the array and then calling App_twi_perform to send the data out (remove the const)

Similar to reading data, the custom transfer function for demo
Write a

Hardware I²c of nRF52832

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