High frequency head setting principle

(1) Terms

Processing Process of High-frequency signals: the high-frequency tuner selects the high-frequency TV signals of the desired channel from the electrical signals received by the antenna, and obtains the intermediate-frequency TV signals PIF and SIF after amplification and mixing. It can be seen that the selection of high frequency headers directly determines the intermediate frequency.

Forward-middle-release: compensated for the insertion loss of the SAW Filter, also known as the forward-middle release.

Acoustic surface filter (SAW): In order to save the frequency band, high-frequency TV signals are transmitted by residual side band. The amplitude-frequency characteristics of the intermediate frequency channel at the receiving end must be adapted. The amplitude-frequency characteristics of this special requirement must be achieved by saw.

(2) The internal schematic diagram of the high-frequency head and related program parameters

The access to the high-frequency header is now interpreted with the actual parameter settings of the XF-5A. The procedure is as follows:
# Elif (tuner_type = tuner_xf_5a)
# Define tn_if_i2c_addr 0x86 // The middle-end address. The default value is mad1, 0x86.
# Define tn_prog_i2c_addr 0xc0 // high frequency header address. The default value is ma1 = MA0 = 0.
# Define tn_switching_subaddr 0x00 // The subaddress of the switch mode
# Define tn_adjust_subaddr 0x01 // subaddress of the adjustment mode
# Define tn_data_subaddr 0x02 // data mode subaddress

// TV System Format

# Define switchdatapal 0xd6
# Define adjustdatapal 0x70 // swap byte data and adjust byte data in Pal format
# Define switchdatasecam 0x46
# Define adjustdatasecam 0x70 // SECAM standard for byte data exchange and adjustment
# Define switchdatantsc 0xd6
# Define adjustdatantsc 0x70 // exchange byte data and adjust byte data in NTSC format

// Sound control byte
# Define soundpali 0x0a
# Define soundpaldk 0x0b
# Define soundpalbg 0x09
# Define soundpalm 0x0c
# Define soundntsc 0x08
# Define soundsecaml 0x4f // It is the data mode byte data in the middle.

// Band switching byte
# Define tn_ctl_byte 0xc0 // The control byte data of the high-frequency header. Generally, the default value is used.
# Define tn_low_band 0x01
# Define tn_mid_band 0x02
# Define tn_high_band 0x08 // bandwideh control word, adjust the frequency receiving switch of the high-frequency Header

# Define tn_freq_ss 50 // set the fundamental frequency, which is determined by nref = 1000 K/50 k = 20.
# Define tn_freq_if 38 // if of the high frequency Header

# Define step_100k 2 // 2*50 = 100
# Define step_200k 4 // 4*50 = 200
# Define step_500k 10 // 10*50 = 500
# Define steps_1m 20 // 20*50 = 1000

// Tda9886 read mode
# Define tn_read_afcwin _ bit7
# Define tn_read_vifl _ bit6
# Define tn_read_fmifl _ bit5
# Define tn_read_afc4 _ bit4
# Define tn_read_afc3 _ bit3
# Define tn_read_afc2 _ bit2
# Define tn_read_afc1 _ bit1
# Define tn_read_ponr _ bit0

# Define tn_read_afc (tn_read_afc1 | tn_read_afc2 | tn_read_afc3 | tn_read_afc4) registers with Automatic Frequency Control

(3) Description of high frequency head registers

A, tn_prog_i2c_addr is the I2C access address of the high-frequency header. The write address is 0xc0 in the program, and the read address is 0xc1. The read or write address is determined by the bytes. The specific address value is variable. For example, ma1 = 0, M01 = 0, and so the address byte is 0xc0.

B, programmable divider settings (Program divider byte 1 and 2). The preceding 15 values are combined according to the power and an integer, that is, the change of the division ratio n. TV mode: fosc = {FRF (PC) + fif (PC)} = Local Vibration, in MHz. For example, fosc [TV] = f [RF] + 38.90. Fosc [TV] is the current vibration of the TV, F [RF] is the receiving frequency of the high frequency head, And 38.90 is the intermediate frequency (intermediate frequency) of the pal D/K system ). Write frequency-to-frequency ratio. formula: natural vibration frequency (m) = natural vibration frequency ratio × step (K), Natural Vibration Frequency-to-natural ratio = natural vibration frequency (m)/step (k) = Local Vibration Frequency * 1000 K/setp (K) = Local Vibration Frequency * 1000/setp = actual frequency * 1000/step + intermediate frequency x1000/step.
C. For step size settings ([TV] Step Size), refer to the RSA and RSB settings. This can be handled according to the actual situation, as follows:

If RSA = RSB = 1 is set, the step size is 62.5 kHz. Then nref = 1 m/62.5 K = 16. set to receive external frequency FRF (PC) = 471.25 MHz, Fif (PC) = 38.90 MHz. Then fosc [TV] = 471.25 MHz + 38.90 MHz = 510.15 MHz, n = int (510.15*16) = 8162 = 1fe2 [H]. This number is the value written into N0 to N14.

D, to control byte, meaning: (charge pump) Cp = 1, 30 μA, CP = 0, 10 μA. T2t1t0 is an operation mode, T2 = t1 = T0 = 0, and is a normal operation mode. OS is the tuning Amplifier Control bit, OS = 0, for normal operation; tuning voltage is on; OS = 1, for switching the charge pump to the High Impedance
State; tuning voltage is off.

E. For bandwidth control switching byte Band Switch byte, as follows:

Set values to switch between the mid-to-high-frequency bands of the high-frequency headers.

(4) read operations on high-frequency Headers

The value of LSB is 1. Ma1 and MA0. Por = power on reset .. (por = 1 at power on); FL = In-lock flag; (FL = 1: loop is locked, FL = 0: loop is not locked); Note 3 is low: if T2 T1 T0 = 001 and PLL is locked. is high then other conditions.

A2, A1 and 01 = built-in 5-Level A/D converter data. (See Table digital AFC status), the table is as follows: