High performance computing with FPGA acceleration

Source: Internet
Author: User

Original link

    • Cause: The processor itself cannot meet the performance requirements of high performance Computing (HPC) applications, resulting in a gap between demand and performance.
    • Initial Workaround: use the coprocessor to improve the performance of the processor.

    • The coprocessor (Hardware-based design) has three capabilities:

1. Dedicated hardware to accelerate the implementation of the key processing functions required in various applications;

2. Use pipelining and parallel structures to keep up with the changing demands of performance;

3. Provides wideband, low latency interfaces for the primary processor and system memory.

    • Coprocessor meets 4P requirements in the HPC market:Performance, productivity, power, price

Problems with the coprocessor: long development time and high cost

    • therefore , the implementation of the coprocessor based on FPGA is proposed.

The 1.FPGA is the basis for coprocessor design and has significant advantages in terms of price, performance, ease of use, and power consumption.

The 2.FPGA is re-programmable, which provides a very flexible custom co-processing capability for a wide range of applications in one chip.

    • Related Products

Altera's Stratix III series FPGAs

1. Logical AND DSP modules are more balanced

2. Row and column architecture

High performance computing with FPGA acceleration

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