HiSilicon audio and video decoding module reading notes (ii)

To grasp the overall video decoding process, at least to know how the data collected.

STEP1: Acquisition of analog signals.

The analog signal is collected by 2866 chip and converted into a digital signal. 2866 chip is to standard AD,DA data conversion chip, in our system mainly realizes the input of analog signal to digital signal,

The output of the digital signal to analog signal. 2866 maximum 4CH video signal can be collected simultaneously.

STEP2: Analog-to-digital conversion.

2866 captured 4CH video signal (analog) converted to 1CH digital signal to send 3520 chip. For beginners like myself, this may be a bit difficult to understand, why the 4CH analog signal

The input 2866 conversion output is just a 1CH digital signal. This involves the point of the knowledge of the electricity, the digital signal is simply high and low level, the height represents 1, the low level represents 0, how to 1CH digital signal

Includes 4-way VI video. Suppose the figure below is a 2866-out video digital signal, a waveform graph in a clock cycle,

-_--_-_--__---_--_-_--__---_--_-_--__----_--_-_--__----_--_-_--__-----_-

The first four signals of the cycle-_--a VI1 video signal, the second signal value is VI2 video signal, the third signal is worth VI3 video signal, the fourth signal is worth VI4 video signal.

step3:2866 output Video Data feed 3520

At this time to introduce a concept, vi equipment, what is the VI device, to 3520来 said, the previous step 2866 acquisition of 4CH analog signal after the conversion of the video data is a VI device, the VI device processing including 4 video data.

The main task of HiSilicon's VI module is to process the VI device's 4CH video data and put the video data into the memory area. As for the future of these memory data for video output, or video encoding, it is another matter.