How I2C works

During the data transmission of I2C bus, the master controller and the beam controller work in two opposite states and do not change during one communication;

1. When the main controller is a transmitter (main control transmitter), the Controller is a receiver (controlled receiver );

2. When the main controller is a receiver (the main controller is a dazzling receiver), the Controller is a transmitter (the controlled TRANSMITTER ).

The figure below shows a complete communication process sequence. Each communication process on the I2C bus is subject to the following rules:

Figure 1 I2C bus signal timing of the complete communication process

1. The master controller takes the initiative to initiate and send the start signal S and stop signal P to take charge of the bus and release the bus respectively.

2. The communication process starts with the start signal S and ends with the stop signal p.

3. There is no limit on the number of bytes transmitted.

4. The master controller sends an address byte immediately after the startup signal, which actually contains the address code of the 7-bit controller and the 1-bit read/write control bit R/W.

5. the read/write control bit R/W (or the direction bit) is used to notify the controller of the direction of data transmission. 0 indicates that the communication is performed by the master controller to write data to the Controller, 1 indicates that the communication is performed by the master controller to read data from the Controller.

6. Each transmission of 1 address byte or Data byte requires a total of 9 clock pulses, of which 1st ~ The eight clock pulses correspond to the information sent by the transmitter to the receiver, and the other nine pulses correspond to an ACK response bit fed back by the receiver sentence transmitter.

7. all controlled devices mounted to the I2C bus receive the address byte after the startup signal, and compare the received 7-bit address code with their own address, if they are consistent, the controller is the Controller addressing, and the response signal is fed back during the 9th clock pulses.

8. Each Data byte is before the transmission time (MSB.