How to see the MCU peripheral A/D converter ADC0804 timing diagram

, a single-chip computer AD Converter:

ADC0804 single-chip integrated A/D converters. It uses a CMOS process 20-pin integrated chip with a resolution of 8 bits, a conversion time of 100μs, and an input voltage range of 0~5v. The chip has a three-state output data latch, which can be directly connected to the bus.

Each pin name and function are as follows:

Vin (+), Vin (-)-two analog input to receive unipolar, bipolar, and differential-mode input signals.

Db7~db0-a digital signal output port with tri-State characteristics.

AGND--analog signal ground.

DGND-digital signal ground.

CLK-the clock signal input.

CLKR-The external resistor end of the internal clock generator, in conjunction with the CLK terminal, generates a clock pulse from the chip itself at a frequency of 1/(1.1RC).

cs#---Chip selector signal input, low-level effective, once the cs# is valid, indicating A/D converter is selected, can start the work.

wr#---Write signal input, low-level start A/D conversion.

rd#---Read signal input, low-level output is valid.

intr#---A/d conversion end signal, active low indicates that the conversion is complete.

VREF/2---Reference level input to determine the quantization unit.

VCC---chip power 5V input.

Opening the ADC0804 data sheet, we can see the following typical circuit-bonding methods:

We can use simulation software to draw out:

Next, let's analyze how it works:

①ADC0804 of the chip select the end of the CS connection U2 latch Q7 output, we can control the latch control of CS, so that the reason is tx-1c the expansion of the experimental board is too much, there is no redundant I/O port independent control ADC0804 CS end, so select U2.

② Vin (+) the middle slide end of the potentiometer, Vin (-) ground, because the two ends can be input differential voltage, that is, it can measure the voltage between VIN (+) and Vin (-), when Vin (-) ground, VIN (+ ) The voltage at the end of the ADC0804 is the analog input voltage. A 10kω resistor in series between VIN (+) and potentiometer is designed to limit the current flowing into the VIN (+) side, preventing the current from being too large to burn A/d chip, and when the Adin is shorted with a short-circuit cap, the middle sliding end of the potentiometer is connected by a resistor R12 to vin (+), which adjusts the potentiometer knob, The voltage of the sliding end changes in 0~VCC, and the ADC0804 digital output also changes in 0x00~0xff.

③ clkr,CLR,GND between the resistor and the capacitance of the RC Oscillation circuit, used to give ADC0804 the pulse required to work, the frequency of the pulse is 1/(1.1RC), according to the chip manual, R take 10kω, C Take 150pf,tx-1c Test board in order to reduce the type of components and welding convenience, C selected is 104 magnetic chip capacitance. In the design of their own circuit, you can choose 150pF Capacitor, otherwise it will affect the conversion rate of a/d.

The ④ VREF/2 end uses two 1kω resistor to divide the voltage to obtain the VCC/2, namely 2.5V, this voltage as the A/D chip operation Internal reference voltage.

⑤wr#, rd# respectively connected to the P3.6 and P3.7 pin of single-chip microcomputer, the digital output end connected with the P1 port of MCU.

The ⑥ connects the AGND and Dgnd to the gnd of the test board simultaneously. When we design products, if the use of a/D and d/A, generally these chips are provided with independent analog Ground (AGND) and digital Ground (DGND) pin, in order to achieve high precision, good stability, it is best to have all the analog and digital connection of all devices, and finally will be simulated with the digital only at one point connection.

⑦ INTR#引脚未连接, the TX-1C Test board reads A/d data is not used interrupt method, so it is not connected to the pin. The digital chip in the operation of the first to analyze its operation sequence diagram, Figure 4.4.6 is the ADC0804 start conversion sequence diagram.

ADC0804 Conversion Timing Diagram:

Analysis Diagram 4.4.6, the CS is low, wr# then low, after at least TW (wr#) l time, wr# pull high, then A/D converter is started, and after (1~8 A/d clock period + internal TC) time, the module/number completed conversion, conversion results into the data latch, At the same time, the intr automatically becomes low, notifying the microcontroller that the conversion has ended. The size of several times is explained in the chip manual.

I am writing a microcontroller program to start a/D conversion to follow the above timing, because the TX-1C test board is not interrupted to read A/D data, so we start a/D conversion, wait a moment, and then directly read A/d digital output can be. Read the end to start a A/D conversion, so loop down. The Force 4.4.7 is the ADC0804 reading data sequence diagram.

The analysis shows that CS is low, wr# then low, after at least TW (wr#) l time, wr# pull high, then A/D converter is started, and after (1~8 A/d clock period + internal TC) time, the module/number completed conversion, the conversion results are stored in the data latch, At the same time, the intr automatically becomes low, notifying the microcontroller that the conversion has ended. The size of several times is explained in the chip manual.

I am writing a microcontroller program to start a/D conversion to follow the above timing, because the TX-1C test board is not interrupted to read A/D data, so we start a/D conversion, wait a moment, and then directly read A/d digital output can be. Read the end to start a A/D conversion, so loop down. The force is the ADC0804 reading the data sequence diagram.

Analysis shows that when the intr# becomes low, the cs# is first low, at least after the rd# low TACC time, the data on the digital output reaches a stable state, the digital output port data can be directly read the data will be able to get the signal, read and go, immediately rd# pull high, and then cs# pull high, intr# is automatically changed, when the rd# low tR1 time, intr# automatically pull high, we do not have to intervene.

Figure 4.4.6 and figure 4.4.7 are ADC0804 to start the conversion and read the data sequence diagram, which is to start once and read the data time series diagram, when we want to continuously convert and continuously read the data, there is no need to each time the cs# low-bit high, because the cs# is a chip-selection signal, Low to indicate that the chip can be operated or in a functioning state, so when writing a program, as long as the beginning of the cs# low, and later when to start the conversion and read data only need to operate wr# and rd#.

How to see the MCU peripheral A/D converter ADC0804 timing diagram