How to evaluate a transimpedance amplifier (Part 1)

Source: Internet
Author: User

In this blog, I want take a different approach and describe the technical challenge encountered while bench characterizing The OPA857, a dedicatedtransimpedance amplifier (TIA) with both internal gain settings operating on a +3.3 V supply suppor Ting a minimum of 100MHz bandwidth.

Besides the combination of both High-gain (5k, and 20k?) and High-bandwidth (>100mhz over temperature and process Varia  tion), the most challenging characteristic of the OPA857 are the need for low input capacitance requirement.  This requirement, including the board parasitic, was to has the total input capacitance less than 1.5pF.  Just as a clarification, the 1.5pF of total input capacitance does does include the package or the transistors parasitic. This value was selected because the OPA857 are driven by a photodiode whose biasing voltage are high enough to the pho Todiode capacitance contribution between 0.5pF and 0.7pF, leaving between 0.8pF to 1pF for external parasitic.

OPA857 Introduction

The OPA857 is a dedicated TIA with pseudo-differential output. The block diagram is provided in Figure 1 below.

Figure 1:opa857 Block diagram

There is three distinct blocks in this diagram:

    • Transimpedance Block
    • Reference Voltage Block
    • Current mirror block (test block)

The transimpedance block has the selectable gain configurations:4.5k? and 18.2k? When taking into consideration the attenuation due to a 500?  Load.  Since There is only one switch, and the parallel combination of the RF2 with RF1 is 4.5k?. The schematic is simplified to ensure, the resulting value is represented clearly.

The Transimpedance block was designed to provide excellent bandwidth (>100mhz) in both gain configurations with the low EST possible RMS noise over its entire bandwidth.

The reference voltage block has several purposes:

    • Provide the adequate dc-reference voltage to the input.
    • Provide a dc-reference at the output allowing the dc-coupled solution to fully differential signal chain, which in turn PR Ovides CMRR as well as converting PSRR issue into CMRR.

The third block available on the pinout are intended to simplify the characterization and the evaluation of the OPA857. Before going further in this device feature and what to characterize it, let's has a look at the expected measured perform  Ance. One of the requirements is to measure as directly as possible in the intended application circuit.

    • Frequency response
    • Pulse response
    • Harmonic Distortion

Reference Block

The reference block is set to be 5/9th of the power supply.  So for 3.3 V, the reference voltage is 1.8 v.  The high bandwidth allows low output impedance to high frequencies.  The reference voltage is and then the Federal Reserve to the paths. One path leading to the output outn have a 25?  Series Resistor.  The other path had a series RC going to the non-inverting input of the TIA. The RC filter is used to minimize the high frequency noise coming from the reference voltage at the buffer input.

TIA Block

The amplifier of the TIA block has a class-a output stage, limiting it swing down from the common-mode voltage of 1.83 V  Almost all the rail. Due to the internal protection, added for both protection and the improved overdrive recovery, it's not possible to swing  Closer to the rail than 0.6V. This still leave 1.2 V swing on the output for the dynamic range, corresponding to a maximum input current of 60uA in the 20k? Gain and 240uA in the 5k? Gain.

A 25?   Series resistance is also found on each output, limiting the loading of the amplifier experiences, but also reduces the gain. With a 500?  Differential load, the attenuation due to the load is 0.83dB, which impacts the overall transimpedance gain. Due to the load attenuation, the 20k? Transimpedance gain is reduced to an effective 18.2k? While the 5k? is reduced to an effective 4.5k?.

Bandwidth consideration

Due to its fixed transimpedance configuration and associated internal compensation, the source input capacitance must stay  Low as stated earlier.  The nominal design target is 1.5pF including board parasitic. Is It isn't recommended to any of the input capacitance in excess of 5pF for maximum flatness in the 5k?  Gain. At 5pF input capacitance, the OPA857 in the 20k?  Gain would peak 1.5dB. See Figure 2a) and 2b) below:

Figure 2:a) 20k? Gain, B) 5k? Gain

Note also that the bandwidth would vary with the load:the heavier the load, the lower the bandwidth. See Figure 3 below.

Figure 3:opa857 Bandwidth variation with load, a) 20k?, b) 5k?

Now there we have reviewed the expected performance of the amplifier, in my next post we can look into actually implementin G The measurements.

How to evaluate a transimpedance amplifier (Part 1)

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