How to output waveforms in FSDB format with VCs

Since Verdi can only view waveforms in the FSDB format, and VCs generates VPD waveform waveforms for dve viewing, if you want to output a waveform in FSDB format, we will add two additional functions to the testbench and compile with the corresponding commands.

1. Start by understanding some of the VCs ' common commands:

-CM Line|cond|fsm|tgl|obc|path how to set coverage
+define+macro=value+ pre-compiled macro definitions
-F filename RTL file list
+incdir+directory+ adding an Include folder
-I enter the interactive interface
-L LogFile File name
-P Pli.tab Define the list (tab) file for PLI
+V2K using the recommended standard
-Y define Verilog Library
-notice display of detailed diagnostic information
-o Specifies the name of the output executable file, default is SIMV
+ nospecify do not sequence check and path delay calculation for specify module
+ Notimingcheck does not perform timing checks, but still adds the path delay to the simulation

2. Here is a very simple example of the command that I used in run: 2-4 decoder:

Note: Testbench Chinese Medicine to add two functions: $fsdbDumpfile ("Decoder.fsdb");

$fsdbDumpvars (0);

VCs decoder_tb.v decoder.v-sverilog-fsdb-debug_all-l Com.log

If the-fsdb is not added, the undefined error of the above two functions will be reported at compile time;

If you do not add-l will not open test.v wrong (this does not know why).

3. Once the compilation is complete, execute the SIMV file.

How to output waveforms in FSDB format with VCs