How to Use UART

Step 1: Initialize the baud rate, line control register-query line Status Register-read data
-Handle error status

-Send data

Step 1 UART initialization procedure

1. Set u0lcr bit bit7 to 1 so that u0dlm u0dll registers can be written.

2. Set the baud rate register value to fpclk/(16 * baud) High 8-bit write u0dlm low 8-bit write u0dll

3. Set u0lcr to 0. Disable u0dlm u0dll to write the remaining u0rbr bits.

4. Set u0lcr, UART line control register, and set the character length, stop bit, and parity.

U0lcr description
Bit
The text length ranges from.
2 stop bit
3 parity enabling
Parity select 00: odd parity 01: Even Parity
6. interval control
7. divisor lock Access 0: Prohibit Access to divisor lock 1: enable access to the divisor lock

After initialization, you can send and receive characters.

Read u0lsr to obtain the status of UART sending and receiving.

U0lsr description
Bit
0 is ready to receive data
1 overflow error
2. parity error
3. Real Error
4. interval Error
5. The send and keep register is empty.
6. the transmitter is empty.
7 FIFO Error

Read/write UART transmission persistence, receiving cache registers can send and receive data
U0rbr is the highest byte of uart rx fifo and contains the earliest received characters. It can be read through the bus interface. If the received characters are less than 8 characters, the unused MSB is filled with 0.

By setting the FIFO control register u0fcr to set the FIFO, you can set the number of characters that receive the FIFO from the cache, for example, sending an interrupt request with 8 characters at most.

Lpc1_1 UART [interrupt mode]

Based on the initialization of the preceding query method, if u0fcr FIFO control register and u0ier interrupt enable register are set, UART interrupt mode can be enabled. Disconnections are mainly generated in the following three situations:

1. The data in the FIFO reaches the trigger point, which can be 1, characters or 14 characters long

2. FIFO timeout. After all, data may not be fully loaded. When the FIFO is not triggered and exceeds the delay time, half of the delay time is 4-5 times of the sending time, a timeout interruption occurs, in this case, the incomplete data in the FIFO can be read. Note: If the FIFO trigger point is set to 8 characters and the current FIFO contains 4 characters, sending is suspended, and timeout interruption occurs, this will occur and one character will be read after each interruption, wait for the remaining characters in the FIFO, interrupt again, and so on.

3. data errors, including parity errors, frame errors, and overflow errors, can be queried in uxlsr.

The interrupt priority is 3> 2 = 1> thre.

Another type of interruption is thre interruption, which will be discussed later.
A typical Initialization
Uart0_init (mode, 115200); // initialize UART. dlab = 0
U0fcr = 0x81; // enable the uart fifo mode trigger point with 8 characters
U0ier = 0x01; // enables RBR interruption and disables interruption of the thre RX line status (when dlab is set to 0)

Vicintselect = 0; // select IRQ for all interrupts
Vicvectcntl0 = 0x20 | 0x06; // The interrupt source of slot0 is UART.
Vicvectaddr0 = (uint32) uart_int; // slot0 interrupt the Service Program

Vicintenable = 1 <0x06; // enable UART interrupt source

Irqenable (); // enable the target board IRQ interrupt

A typical Interrupt Processing Routine

Void _ IRQ uart_int ()
...{
Uint8 I;

Uart0_send_str ("interrupt! ");

If (u0iir & 0x0f) = 0x04)... {// If the interruption is caused by the FIFO data reaching the trigger point
Rcv_new = 1;
For (I = 0; I <8; I ++ )...{
Buffer [I] = u0rbr;
}
} Else if (u0iir & 0x0f) = 0x0c)... {// If the interruption is caused by FIFO timeout
Buffer [0] = u0rbr;
Uart0_send_byte (buffer [0]);
}

Vicvectaddr = 0; // clear the interrupt mark, which is not an external interrupt and does not have to be reset extint
}